Equalization of modal dispersion in multimode fiber using spatial light modulators. - Elad Alon; Vladimir Stojanovic; Joseph M. Kahn; Stephen P. Boyd; Mark Horowitz (GLOBECOM, 2004)

Modeling, simulation, and design of a multi-mode 2-10 Gb/sec fully adaptive serial link system. - Carl W. Werner; C. Hoyer; Andrew Ho; Metha Jeeradit; Fred Chen; Bruno W. Garlepp; Bill Stonecypher; Simon Li; Akash Bansal; Amita Agarwal; Elad Alon; Vladimir Stojanovic; et al. (CICC, 2005)

Scalable circuits for supply noise measurement. - Valentin A. Abramzon; Elad Alon; Bita Nezamfar; Mark Horowitz (ESSCIRC, 2005)

Circuits and techniques for high-resolution measurement of on-chip power supply noise. - Elad Alon; Vladimir Stojanovic; Mark A. Horowitz (IEEE J. Solid State Circuits, 2005)

Architecture and circuit techniques for a 1.1-GHz 16-kb reconfigurable memory in 0.18-μm CMOS. - Ken Mai; Ron Ho; Elad Alon; Dean Liu; Younggon Kim; Dinesh Patil; Mark A. Horowitz (IEEE J. Solid State Circuits, 2005)

Autonomous dual-mode (PAM2/4) serial link transceiver with adaptive equalization and data recovery. - Vladimir Stojanovic; Andrew Ho; Bruno W. Garlepp; Fred Chen; Jason Wei; Grace Tsang; Elad Alon; Ravi T. Kollipara; Carl W. Werner; Jared L. Zerbe; Mark A. Horowitz (IEEE J. Solid State Circuits, 2005)

Replica compensated linear regulators for supply-regulated phase-locked loops. - Elad Alon; Jaeha Kim; Sudhakar Pamarti; Ken Chang; Mark Horowitz (IEEE J. Solid State Circuits, 2006)

The implementation of a 2-core, multi-threaded itanium family processor. - Samuel Naffziger; Blaine A. Stackhouse; Tom Grutkowski; Doug Josephson; Jayen Desai; Elad Alon; Mark Horowitz (IEEE J. Solid State Circuits, 2006)

Integrated circuit design with NEM relays. - Fred Chen; Hei Kam; Dejan Markovic; Tsu-Jae King Liu; Vladimir Stojanovic; Elad Alon (ICCAD, 2008)

Integrated Regulation for Energy-Efficient Digital Circuits. - Elad Alon; Mark Horowitz (IEEE J. Solid State Circuits, 2008)

Digital Circuit Design Trends. - Mark Horowitz; Donald Stark 001; Elad Alon (IEEE J. Solid State Circuits, 2008)

A 90nm CMOS low-power 60GHz transceiver with integrated baseband circuitry. - Cristian Marcu; Debopriyo Chowdhury; Chintan Thakkar; Lingkai Kong; Maryam Tabesh; Jung-Dong Park; Yanjie Wang; Bagher Afshar; Abhinav Gupta 001; Amin Arbabian; Simone Gambini; Reza Zamani; et al. (ISSCC, 2009)

A 90 nm CMOS Low-Power 60 GHz Transceiver With Integrated Baseband Circuitry. - Cristian Marcu; Debopriyo Chowdhury; Chintan Thakkar; Jung-Dong Park; Lingkai Kong; Maryam Tabesh; Yanjie Wang; Bagher Afshar; Abhinav Gupta 001; Amin Arbabian; Simone Gambini; Reza Zamani; et al. (IEEE J. Solid State Circuits, 2009)

Energy-Performance Tunable Logic. - Bita Nezamfar; Elad Alon; Mark Horowitz (IEEE J. Solid State Circuits, 2009)

A 2.4GHz mixed-signal polar power amplifier with low-power integrated filtering in 65nm CMOS. - Debopriyo Chowdhury; Lu Ye; Elad Alon; Ali M. Niknejad (CICC, 2010)

An energy-efficient ring-oscillator digital PLL. - John Crossley; Eric Naviasky; Elad Alon (CICC, 2010)

Analysis and demonstration of MEM-relay power gating. - Hossein Fariborzi; Matthew Spencer; Vaibhav Karkare; Jaeseok Jeon; Rhesa Nathanael; Chengcheng Wang; Fred Chen; Hei Kam; Vincent Pott; Tsu-Jae King Liu; Elad Alon; Vladimir Stojanovic; et al. (CICC, 2010)

Clocking Links in Multi-chip Packages: A Case Study. - Tamer A. Ali 001; Dinesh Patil; Frankie Liu; Elad Alon; Jon K. Lexau; Chih-Kong Ken Yang; Ron Ho (Hot Interconnects, 2010)

Demonstration of integrated micro-electro-mechanical switch circuits for VLSI applications. - Fred Chen; Matthew Spencer; Rhesa Nathanael; Chengcheng Wang; Hossein Fariborzi; Abhinav Gupta 001; Hei Kam; Vincent Pott; Jaeseok Jeon; Tsu-Jae King Liu; Dejan Markovic; Vladimir Stojanovic; et al. (ISSCC, 2010)

A 32nm fully integrated reconfigurable switched-capacitor DC-DC converter delivering 0.55W/mm2 at 81% efficiency. - Hanh-Phuc Le; Michael D. Seeman; Seth Sanders; Visvesh S. Sathe 001; Samuel Naffziger; Elad Alon (ISSCC, 2010)

Optical Interconnect for High-End Computer Systems. - Ron Ho; Frankie Liu; Dinesh Patil; Xuezhe Zheng; Guoliang Li 003; Ivan Shubin; Elad Alon; Jon K. Lexau; Herb Schwetman; John E. Cunningham; Ashok V. Krishnamoorthy (IEEE Des. Test Comput., 2010)

Mechanical Computing Redux: Relays for Integrated Circuit Applications. - Vincent Pott; Hei Kam; Rhesa Nathanael; Jaeseok Jeon; Elad Alon; Tsu-Jae King Liu (Proc. IEEE, 2010)

Digitally-assisted analog circuits for a 10 Gbps, 395 fJ/b optical receiver in 40 nm CMOS. - Philip Amberg; Frankie Liu; Michael Dayringer; Jon K. Lexau; Dinesh Patil; Jonathan Gainsley; Hesam Fathi Moghadam; Elad Alon; Xuezhe Zheng; John E. Cunningham; Ashok V. Krishnamoorthy; Ron Ho (A-SSCC, 2011)

A multi-GHz area-efficient comparator with dynamic offset cancellation. - Lingkai Kong; Yue Lu 007; Elad Alon (CICC, 2011)

Fully integrated switched-capacitor DC-DC conversion. - Elad Alon; Hanh-Phuc Le; Seth Sanders (Hot Chips Symposium, 2011)

A 65nm CMOS 4-element Sub-34mW/element 60GHz phased-array transceiver. - Maryam Tabesh; Jiashu Chen; Cristian Marcu; Lingkai Kong; Shinwon Kang; Elad Alon; Ali M. Niknejad (ISSCC, 2011)

An Efficient Mixed-Signal 2.4-GHz Polar Power Amplifier in 65-nm CMOS Technology. - Debopriyo Chowdhury; Lu Ye; Elad Alon; Ali M. Niknejad (IEEE J. Solid State Circuits, 2011)

Design Techniques for Fully Integrated Switched-Capacitor DC-DC Converters. - Hanh-Phuc Le; Seth Sanders; Elad Alon (IEEE J. Solid State Circuits, 2011)

Demonstration of Integrated Micro-Electro-Mechanical Relay Circuits for VLSI Applications. - Matthew Spencer; Fred Chen; Cheng C. Wang; Rhesa Nathanael; Hossein Fariborzi; Abhinav Gupta 001; Hei Kam; Vincent Pott; Jaeseok Jeon; Tsu-Jae King Liu; Dejan Markovic; Elad Alon; et al. (IEEE J. Solid State Circuits, 2011)

A 65 nm CMOS 4-Element Sub-34 mW/Element 60 GHz Phased-Array Transceiver. - Maryam Tabesh; Jiashu Chen; Cristian Marcu; Lingkai Kong; Shinwon Kang; Ali M. Niknejad; Elad Alon (IEEE J. Solid State Circuits, 2011)

A CMOS switched-capacitor fractional bandgap reference. - William Biederman; Daniel J. Yeager; Elad Alon; Jan M. Rabaey (CICC, 2012)

A 10Gb/s 10mW 2-tap reconfigurable pre-emphasis transmitter in 65nm LP CMOS. - Yue Lu 007; Kwangmo Jung; Yasuo Hidaka; Elad Alon (CICC, 2012)

Design of high-speed wireline transceivers for backplane communications in 28nm CMOS. - Jafar Savoj; Kenny C.-H. Hsieh; Parag Upadhyaya; Fu-Tai An; Jay Im; Xuewen Jiang; Jalil Kamali; Kang Wei Lai; Zhaoyin Daniel Wu; Elad Alon; Ken Chang (CICC, 2012)

A 21.5mW 10+Gb/s mm-Wave phased-array transmitter in 65nm CMOS. - Lingkai Kong; Elad Alon (VLSIC, 2012)

A 260 GHz fully integrated CMOS transceiver for wireless chip-to-chip communication. - Jung-Dong Park; Shinwon Kang; Siva V. Thyagarajan; Elad Alon; Ali M. Niknejad (VLSIC, 2012)

A wide common-mode fully-adaptive multi-standard 12.5Gb/s backplane transceiver in 28nm CMOS. - Jafar Savoj; Kenny C.-H. Hsieh; Parag Upadhyaya; Fu-Tai An; Ade Bekele; Stanley Chen; Xuewen Jiang; Kang Wei Lai; Chi Fung Poon; Aman Sewani; Didem Turker; Karthik Venna; et al. (VLSIC, 2012)

A fully-integrated 10.5µW miniaturized (0.125mm2) wireless neural sensor. - Daniel J. Yeager; William Biederman; Nathan Narevsky; Elad Alon; Jan M. Rabaey (VLSIC, 2012)

A Fully-Integrated Efficient CMOS Inverse Class-D Power Amplifier for Digital Polar Transmitters. - Debopriyo Chowdhury; Siva V. Thyagarajan; Lu Ye; Elad Alon; Ali M. Niknejad (IEEE J. Solid State Circuits, 2012)

A Fully Integrated, 290 pJ/bit UWB Dual-Mode Transceiver for cm-Range Wireless Interconnects. - Simone Gambini; John Crossley; Elad Alon; Jan M. Rabaey (IEEE J. Solid State Circuits, 2012)

10-Gbps, 5.3-mW Optical Transmitter and Receiver Circuits in 40-nm CMOS. - Frankie Liu; Dinesh Patil; Jon K. Lexau; Philip Amberg; Michael Dayringer; Jonathan Gainsley; Hesam Fathi Moghadam; Xuezhe Zheng; John E. Cunningham; Ashok V. Krishnamoorthy; Elad Alon; Ron Ho (IEEE J. Solid State Circuits, 2012)

A 10 Gb/s 45 mW Adaptive 60 GHz Baseband in 65 nm CMOS. - Chintan Thakkar; Lingkai Kong; Kwangmo Jung; Antoine Frappé; Elad Alon (IEEE J. Solid State Circuits, 2012)

A 12.8GS/s time-interleaved SAR ADC with 25GHz 3dB ERBW and 4.6b ENOB. - Yida Duan; Elad Alon (CICC, 2013)

BAG: a designer-oriented integrated framework for the development of AMS circuit generators. - John Crossley; Alberto Puggelli; Hanh-Phuc Le; B. Yang; R. Nancollas; Kwangmo Jung; Lingkai Kong; Nathan Narevsky; Yue Lu 007; Nicholas Sutardja; E. J. An; Alberto L. Sangiovanni-Vincentelli; et al. (ICCAD, 2013)

F3: Emerging technologies for wireline communication. - Elad Alon; Azita Emami; Gerrit den Besten; Ichiro Fujimori; Tadahiro Kuroda; Masafumi Nogawa; Hisakatsu Yamaguchi (ISSCC, 2013)

A 50mW-TX 65mW-RX 60GHz 4-element phased-array transceiver with integrated antennas in 65nm CMOS. - Lingkai Kong; Dongjin Seo; Elad Alon (ISSCC, 2013)

A sub-ns response fully integrated battery-connected switched-capacitor voltage regulator delivering 0.19W/mm2 at 73% efficiency. - Hanh-Phuc Le; John Crossley; Seth Sanders; Elad Alon (ISSCC, 2013)

A 66Gb/s 46mW 3-tap decision-feedback equalizer in 65nm CMOS. - Yue Lu 007; Elad Alon (ISSCC, 2013)

A mixed-signal 32-coefficient RX-FFE 100-coefficient DFE for an 8Gb/s 60GHz receiver in 65nm LP CMOS. - Chintan Thakkar; Nathan Narevsky; Christopher D. Hull; Elad Alon (ISSCC, 2013)

A digitally modulated 2.4GHz WLAN transmitter with integrated phase path and dynamic load modulation in 65nm CMOS. - Lu Ye; Jiashu Chen; Lingkai Kong; Philippe Cathelin; Elad Alon; Ali M. Niknejad (ISSCC, 2013)

Physical principles for scalable neural recording. - Adam H. Marblestone; Bradley M. Zamft; Yael Maguire; Mikhail G. Shapiro; Thaddeus Cybulski; Joshua I. Glaser; Dario Amodei; P. Benjamin Stranges; Reza Kalhor; David Dalrymple; Dongjin Seo; Elad Alon; et al. (Frontiers Comput. Neurosci., 2013)

A Fully-Integrated, Miniaturized (0.125 mm2) 10.5 µW Wireless Neural Sensor. - William Biederman; Daniel J. Yeager; Nathan Narevsky; Aaron C. Koralek; Jose M. Carmena; Elad Alon; Jan M. Rabaey (IEEE J. Solid State Circuits, 2013)

Design Techniques for a 66 Gb/s 46 mW 3-Tap Decision Feedback Equalizer in 65 nm CMOS. - Yue Lu 007; Elad Alon (IEEE J. Solid State Circuits, 2013)

Design and Analysis of Energy-Efficient Reconfigurable Pre-Emphasis Voltage-Mode Transmitters. - Yue Lu 007; Kwangmo Jung; Yasuo Hidaka; Elad Alon (IEEE J. Solid State Circuits, 2013)

Design Considerations for a Direct Digitally Modulated WLAN Transmitter With Integrated Phase Path and Dynamic Impedance Modulation. - Lu Ye; Jiashu Chen; Lingkai Kong; Elad Alon; Ali M. Niknejad (IEEE J. Solid State Circuits, 2013)

A frequency-reconfigurable multi-standard 65nm CMOS digital transmitter with LTCC interposers. - Nai-Chung Kuo; Bonjern Yang; Chaoying Wu; Lingkai Kong; Angie Wang; Michael Reiha; Elad Alon; Ali M. Niknejad; Borivoje Nikolic (A-SSCC, 2014)

Beamforming approaches for untethered, ultrasonic neural dust motes for cortical recording: A simulation study. - Alexander Bertrand; Dongjin Seo; Filip Maksimovic; Jose M. Carmena; Michel M. Maharbiz; Elad Alon; Jan M. Rabaey (EMBC, 2014)

24.1 A miniaturized 64-channel 225μW wireless electrocorticographic neural sensor. - Rikky Muller; Hanh-Phuc Le; Wen Li; Peter Ledochowitsch; Simone Gambini; Toni Björninen; Aaron C. Koralek; Jose M. Carmena; Michel M. Maharbiz; Elad Alon; Jan M. Rabaey (ISSCC, 2014)

F6: Energy-efficient I/O design for next-generation systems. - Frank O'Mahony; Nicola Da Dalt; Ken Chang; Hisakatsu Yamaguchi; Chulwoo Kim; Elad Alon (ISSCC, 2014)

A 4.78mm2 fully-integrated neuromodulation SoC combining 64 acquisition channels with digital compression and simultaneous dual stimulation. - Daniel J. Yeager; William Biederman; Nathan Narevsky; Jaclyn Leverett; Ryan Neely; Jose M. Carmena; Elad Alon; Jan M. Rabaey (VLSIC, 2014)

A 12.8 GS/s Time-Interleaved ADC With 25 GHz Effective Resolution Bandwidth and 4.6 ENOB. - Yida Duan; Elad Alon (IEEE J. Solid State Circuits, 2014)

Design Techniques for a Mixed-Signal I/Q 32-Coefficient Rx-Feedforward Equalizer, 100-Coefficient Decision Feedback Equalizer in an 8 Gb/s 60 GHz 65 nm LP CMOS Receiver. - Chintan Thakkar; Nathan Narevsky; Christopher D. Hull; Elad Alon (IEEE J. Solid State Circuits, 2014)

A Wideband 400 MHz-to-4 GHz Direct RF-to-Digital Multimode ΔΣ Receiver. - Charles Wu; Elad Alon; Borivoje Nikolic (IEEE J. Solid State Circuits, 2014)

A circuit designer's guide to 5G mm-wave. - Ali M. Niknejad; Siva V. Thyagarajan; Elad Alon; Yanjie Wang; Christopher D. Hull (CICC, 2015)

Ultrasonic beamforming system for interrogating multiple implantable sensors. - Dongjin Seo; Hao-Yen Tang; Jose M. Carmena; Jan M. Rabaey; Elad Alon; Bernhard E. Boser; Michel M. Maharbiz (EMBC, 2015)

Raven: A 28nm RISC-V vector processor with integrated switched-capacitor DC-DC converters and adaptive clocking. - Yunsup Lee; Brian Zimmer; Andrew Waterman; Alberto Puggelli; Jaehwa Kwak; Ruzica Jevtic; Ben Keller; Stevo Bailey; Milovan Blagojevic; Pi-Feng Chiu; Henry Cook; Rimas Avizienis; et al. (Hot Chips Symposium, 2015)

A scalable massive MIMO array architecture based on common modules. - Antonio Puglielli; Nathan Narevsky; Pengpeng Lu; Thomas A. Courtade; Gregory Wright; Borivoje Nikolic; Elad Alon (ICC Workshops, 2015)

F6: I/O design at 25Gb/s and beyond: Enabling the future communication infrastructure for big data. - Ken Chang; Frank O'Mahony; Elad Alon; Hyeon-Min Bae; Nicola Da Dalt; Eric Fluhr (ISSCC, 2015)

A 6b 46GS/s ADC with >23GHz BW and sparkle-code error correction. - Yida Duan; Elad Alon (VLSIC, 2015)

A 60Gb/s 173mW receiver frontend in 65nm CMOS technology. - Jaeduk Han; Yue Lu 007; Nicholas Sutardja; Kwangmo Jung; Elad Alon (VLSIC, 2015)

A RISC-V vector processor with tightly-integrated switched-capacitor DC-DC converters in 28nm FDSOI. - Brian Zimmer; Yunsup Lee; Alberto Puggelli; Jaehwa Kwak; Ruzica Jevtic; Ben Keller; Stevo Bailey; Milovan Blagojevic; Pi-Feng Chiu; Hanh-Phuc Le; Po-Hung Chen; Nicholas Sutardja; et al. (VLSIC, 2015)

Dual-Input Switched Capacitor Converter Suitable for Wide Voltage Gain Range. - Gaël Pillonnet; Arnaud Andrieu; Elad Alon (IEEE J. Emerg. Sel. Topics Circuits Syst., 2015)

A 4.78 mm 2 Fully-Integrated Neuromodulation SoC Combining 64 Acquisition Channels With Digital Compression and Simultaneous Dual Stimulation. - William Biederman; Daniel J. Yeager; Nathan Narevsky; Jaclyn Leverett; Ryan Neely; Jose M. Carmena; Elad Alon; Jan M. Rabaey (IEEE J. Solid State Circuits, 2015)

Introduction to the Special Issue on the IEEE 2014 Custom Integrated Circuits Conference. - Andrea Mazzanti; Elad Alon (IEEE J. Solid State Circuits, 2015)

A Minimally Invasive 64-Channel Wireless μECoG Implant. - Rikky Muller; Hanh-Phuc Le; Wen Li; Peter Ledochowitsch; Simone Gambini; Toni Björninen; Aaron C. Koralek; Jose M. Carmena; Michel M. Maharbiz; Elad Alon; Jan M. Rabaey (IEEE J. Solid State Circuits, 2015)

Miniaturizing Ultrasonic System for Portable Health Care and Fitness. - Hao-Yen Tang; Dongjin Seo; Utkarsh Singhal; Xi Li 005; Michel M. Maharbiz; Elad Alon; Bernhard E. Boser (IEEE Trans. Biomed. Circuits Syst., 2015)

Per-Core DVFS With Switched-Capacitor Converters for Energy Efficiency in Manycore Processors. - Ruzica Jevtic; Hanh-Phuc Le; Milovan Blagojevic; Stevo Bailey; Krste Asanovic; Elad Alon; Borivoje Nikolic (IEEE Trans. Very Large Scale Integr. Syst., 2015)

Powering and communication for OMNI: A distributed and modular closed-loop neuromodulation device. - Ali Moin; George Alexandrov; Benjamin C. Johnson; Igor I. Izyumin; Fred L. Burghardt; Kedar Shah; Sat Pannu; Elad Alon; Rikky Muller; Jan M. Rabaey (EMBC, 2016)

Sub-microsecond adaptive voltage scaling in a 28nm FD-SOI processor SoC. - Ben Keller; Martin Cochet; Brian Zimmer; Yunsup Lee; Milovan Blagojevic; Jaehwa Kwak; Alberto Puggelli; Stevo Bailey; Pi-Feng Chiu; Daniel Palmer Dabbelt; Colin Schmidt 001; Elad Alon; et al. (ESSCIRC, 2016)

A 65nm CMOS wideband TDD front-end with integrated T/R switching via PA re-use. - Xiao Xiao 005; Amanda Pratt; Ali M. Niknejad; Elad Alon; Borivoje Nikolic (ESSCIRC, 2016)

Phase noise scaling and tracking in OFDM multi-user beamforming arrays. - Antonio Puglielli; Greg LaCaille; Ali M. Niknejad; Gregory Wright; Borivoje Nikolic; Elad Alon (ICC, 2016)

F4: Emerging short-reach and high-density interconnect solutions for internet of everything. - Ichiro Fujimori; Martin Brox; Elad Alon; Pavan Kumar Hanumolu; Gerrit den Besten; Hideyuki Nosaka (ISSCC, 2016)

A 65nm CMOS transceiver with integrated active cancellation supporting FDD from 1GHz to 1.8GHz at +12.6dBm TX power leakage. - Sameet Ramakrishnan; Lucas Calderin; Antonio Puglielli; Elad Alon; Ali M. Niknejad; Borivoje Nikolic (VLSI Circuits, 2016)

Design Techniques for a 60 Gb/s 173 mW Wireline Receiver Frontend in 65 nm CMOS Technology. - Jaeduk Han; Yue Lu 007; Nicholas Sutardja; Kwangmo Jung; Elad Alon (IEEE J. Solid State Circuits, 2016)

Introduction to the December Special Issue on the 2016 IEEE International Solid-State Circuits Conference. - Edgar Sánchez-Sinencio; Jan Mulder; Antonio Liscidini; Eric A. M. Klumperink; Elad Alon (IEEE J. Solid State Circuits, 2016)

A RISC-V Vector Processor With Simultaneous-Switching Switched-Capacitor DC-DC Converters in 28 nm FDSOI. - Brian Zimmer; Yunsup Lee; Alberto Puggelli; Jaehwa Kwak; Ruzica Jevtic; Ben Keller; Steven Bailey; Milovan Blagojevic; Pi-Feng Chiu; Hanh-Phuc Le; Po-Hung Chen; Nicholas Sutardja; et al. (IEEE J. Solid State Circuits, 2016)

An Agile Approach to Building RISC-V Microprocessors. - Yunsup Lee; Andrew Waterman; Henry Cook; Brian Zimmer; Ben Keller; Alberto Puggelli; Jaehwa Kwak; Ruzica Jevtic; Stevo Bailey; Milovan Blagojevic; Pi-Feng Chiu; Rimas Avizienis; et al. (IEEE Micro, 2016)

Design of Energy- and Cost-Efficient Massive MIMO Arrays. - Antonio Puglielli; Andrew Townley; Greg LaCaille; Vladimir M. Milovanovic; Pengpeng Lu; Konstantin Trotskovsky; Amy Whitcombe; Nathan Narevsky; Gregory Wright; Thomas A. Courtade; Elad Alon; Borivoje Nikolic; et al. (Proc. IEEE, 2016)

A 0.37mm2 LTE/Wi-Fi compatible, memory-based, runtime-reconfigurable 2n3m5k FFT accelerator integrated with a RISC-V core in 16nm FinFET. - Angie Wang; Brian C. Richards; Daniel Palmer Dabbelt; Howard Mao; Stevo Bailey; Jaeduk Han; Eric Chang; James Dunn 003; Elad Alon; Borivoje Nikolic (A-SSCC, 2017)

Blind parallel interrogation of ultrasonic neural dust motes based on canonical polyadic decomposition: A simulation study. - Alexander Bertrand; Dongjin Seo; Jose M. Carmena; Michel M. Maharbiz; Elad Alon; Jan M. Rabaey (EUSIPCO, 2017)

6.2 A 60Gb/s 288mW NRZ transceiver with adaptive equalization and baud-rate clock and data recovery in 65nm CMOS technology. - Jaeduk Han; Yue Lu 007; Nicholas Sutardja; Elad Alon (ISSCC, 2017)

Analysis and Design of Integrated Active Cancellation Transceiver for Frequency Division Duplex Systems. - Lucas Calderin; Sameet Ramakrishnan; Antonio Puglielli; Elad Alon; Borivoje Nikolic; Ali M. Niknejad (IEEE J. Solid State Circuits, 2017)

Design Techniques for a 60-Gb/s 288-mW NRZ Transceiver With Adaptive Equalization and Baud-Rate Clock and Data Recovery in 65-nm CMOS Technology. - Jaeduk Han; Nicholas Sutardja; Yue Lu 007; Elad Alon (IEEE J. Solid State Circuits, 2017)

A RISC-V Processor SoC With Integrated Power Management at Submicrosecond Timescales in 28 nm FD-SOI. - Ben Keller; Martin Cochet; Brian Zimmer; Jaehwa Kwak; Alberto Puggelli; Yunsup Lee; Milovan Blagojevic; Stevo Bailey; Pi-Feng Chiu; Daniel Palmer Dabbelt; Colin Schmidt 001; Elad Alon; et al. (IEEE J. Solid State Circuits, 2017)

A 65-nm CMOS Wideband TDD Front-End With Integrated T/R Switching via PA Re-Use. - Xiao Xiao 005; Amanda Pratt; Bonjern Yang; Angie Wang; Ali M. Niknejad; Elad Alon; Borivoje Nikolic (IEEE J. Solid State Circuits, 2017)

Reliable Next-Generation Cortical Interfaces for Chronic Brain-Machine Interfaces and Neuroscience. - Michel M. Maharbiz; Rikky Muller; Elad Alon; Jan M. Rabaey; Jose M. Carmena (Proc. IEEE, 2017)

A Generated Multirate Signal Analysis RISC-V SoC in 16nm FinFET. - Stevo Bailey; Jaeduk Han; Paul Rigge; Richard Lin; Eric Chang; Howard Mao; Zhongkai Wang; Chick Markley; Adam M. Izraelevitz; Angie Wang; Nathan Narevsky; Woo-Rham Bae; et al. (A-SSCC, 2018)

BAG2: A process-portable framework for generator-based AMS circuit design. - Eric Chang; Jaeduk Han; Woo-Rham Bae; Zhongkai Wang; Nathan Narevsky; Borivoje Nikolic; Elad Alon (CICC, 2018)

Generating the Next Wave of Custom Silicon. - Borivoje Nikolic; Elad Alon; Krste Asanovic (ESSCIRC, 2018)

A Real-Time, Analog/Digital Co-Designed 1.89-GHz Bandwidth, 175-kHz Resolution Sparse Spectral Analysis RISC-V SoC in 16-nm FinFET. - Angie Wang; Woo-Rham Bae; Jaeduk Han; Stevo Bailey; Paul Rigge; Orhan Ocal; Zhongkai Wang; Kannan Ramchandran; Elad Alon; Borivoje Nikolic (ESSCIRC, 2018)

An Automated SerDes Frontend Generator Verified with a 16NM Instance Achieving 15 GB/S at 1.96 PJ/Bit. - Eric Chang; Nathan Narevsky; Jaeduk Han; Elad Alon (VLSI Circuits, 2018)

A 65-nm CMOS I/Q RF Power DAC With 24- to 42-dB Third-Harmonic Cancellation and Up to 18-dB Mixed-Signal Filtering. - Bonjern Yang; Eric Chang; Ali M. Niknejad; Borivoje Nikolic; Elad Alon (IEEE J. Solid State Circuits, 2018)

Beyond Schematic Capture: Meaningful Abstractions for Better Electronics Design Tools. - Richard Lin; Rohit Ramesh; Antonio Iannopollo; Alberto L. Sangiovanni-Vincentelli; Prabal Dutta; Elad Alon; Björn Hartmann (CHI, 2019)

Mixed-Signal Electrical Interfaces. - Elad Alon (CICC, 2019)

BAG: A Process-Portable Framework for Generator-based AMS Circuit Design. - Eric Chang; Nathan Narevsky; Krishna Settaluri; Elad Alon (CICC, 2019)

A Generated 7GS/s 8b Time-Interleaved SAR ADC with 38.2dB SNDR at Nyquist in 16nm CMOS FinFET. - Jaeduk Han; Eric Chang; Stevo Bailey; Zhongkai Wang; Woo-Rham Bae; Angie Wang; Nathan Narevsky; Amy Whitcombe; Pengpeng Lu; Borivoje Nikolic; Elad Alon (CICC, 2019)

Open-Source EDA Tools and IP, A View from the Trenches. - Elad Alon; Krste Asanovic; Jonathan Bachrach; Borivoje Nikolic (DAC, 2019)

A 2-tap switched capacitor FFE transmitter achieving 1-20 Gb/s at 0.72-0.62 pJ/bit. - Nicholas Sutardja; Jaeduk Han; Nathan Narevsky; Elad Alon (ESSCIRC, 2019)

Design and Automatic Generation of High-Speed Circuits for Wireline Communications. - Jaeduk Han; Eric Chang; Elad Alon (ISOCC, 2019)

A Mixed-Signal RISC-V Signal Analysis SoC Generator With a 16-nm FinFET Instance. - Steven Bailey; Paul Rigge; Jaeduk Han; Richard Lin; Eric Chang; Howard Mao; Zhongkai Wang; Chick Markley; Adam M. Izraelevitz; Angie Wang; Nathan Narevsky; Woo-Rham Bae; et al. (IEEE J. Solid State Circuits, 2019)

A Real-Time, 1.89-GHz Bandwidth, 175-kHz Resolution Sparse Spectral Analysis RISC-V SoC in 16-nm FinFET. - Angie Wang; Woo-Rham Bae; Jaeduk Han; Stevo Bailey; Orhan Ocal; Paul Rigge; Zhongkai Wang; Kannan Ramchandran; Elad Alon; Borivoje Nikolic (IEEE J. Solid State Circuits, 2019)

A Fully Integrated, Dual Channel, Flip Chip Packaged 113 GHz Transceiver in 28nm CMOS supporting an 80 Gb/s Wireless Link. - Andrew Townley; Nima Baniasadi; Sashank Krishnamurthy; Constantine Sideris; Ali Hajimiri; Elad Alon; Ali M. Niknejad (CICC, 2020)

Design and Demonstration of a Scalable Massive MIMO Uplink at E-Band. - Greg LaCaille; James Dunn 003; Antonio Puglielli; Lorenzo Iotti; Sameet Ramakrishnan; Lucas Calderin; Zhenghan Lin; Emily Naviasky; Borivoje Nikolic; Ali M. Niknejad; Elad Alon (ICC Workshops, 2020)

A Methodology for Reusable Physical Design. - Edward Wang; Colin Schmidt 001; Adam M. Izraelevitz; John Charles Wright; Borivoje Nikolic; Elad Alon; Jonathan Bachrach (ISQED, 2020)

An Automated and Process-Portable Generator for Phase-Locked Loop. - Zhongkai Wang; Minsoo Choi 002; Eric Chang; John Charles Wright; Wooham Bae; Sijun Du; Zhaokai Liu; Nathan Narevsky; Colin Schmidt 001; Ayan Biswas; Borivoje Nikolic; Elad Alon (DAC, 2021)

A 16mm2 106.1 GOPS/W Heterogeneous RISC-V Multi-Core Multi-Accelerator SoC in Low-Power 22nm FinFET. - Abraham Gonzalez; Jerry Zhao; Ben Korpan; Hasan Genc; Colin Schmidt 001; John Charles Wright; Ayan Biswas; Alon Amid; Farhana Sheikh; Anton Sorokin; Sirisha Kale; Mani Yalamanchi; et al. (ESSCIRC, 2021)

8 An Output-Bandwidth-Optimized 200Gb/s PAM-4 100Gb/s NRZ Transmitter with 5-Tap FFE in 28nm CMOS. - Minsoo Choi 002; Zhongkai Wang; Kyoungtae Lee; Kwanseo Park; Zhaokai Liu; Ayan Biswas; Jaeduk Han; Elad Alon (ISSCC, 2021)

14.1 A 71-to-86GHz Packaged 16-Element by 16-Beam Multi-User Beamforming Integrated Receiver in 28nm CMOS. - Emily Naviasky; Lorenzo Iotti; Greg LaCaille; Borivoje Nikolic; Elad Alon; Ali M. Niknejad (ISSCC, 2021)

4.3 An Eight-Core 1.44GHz RISC-V Vector Machine in 16nm FinFET. - Colin Schmidt 001; John Charles Wright; Zhongkai Wang; Eric Chang; Albert J. Ou; Woo-Rham Bae; Sean Huang; Anita Flynn; Brian C. Richards; Krste Asanovic; Elad Alon; Borivoje Nikolic (ISSCC, 2021)

A 71-to-86-GHz 16-Element by 16-Beam Multi-User Beamforming Integrated Receiver Sub-Array for Massive MIMO. - Emily Naviasky; Lorenzo Iotti; Greg LaCaille; Borivoje Nikolic; Elad Alon; Ali M. Niknejad (IEEE J. Solid State Circuits, 2021)

LAYGO: A Template-and-Grid-Based Layout Generation Engine for Advanced CMOS Technologies. - Jaeduk Han; Woo-Rham Bae; Eric Chang; Zhongkai Wang; Borivoje Nikolic; Elad Alon (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

A Ring-Oscillator Sub-Sampling PLL With Hybrid Loop Using Generator-Based Design Flow. - Zhongkai Wang; Minsoo Choi 002; John Charles Wright; Kyoungtae Lee; Zhaokai Liu; Bozhi Yin; Jaeduk Han; Sijun Du; Elad Alon (ISCAS, 2022)

A 200Gb/s PAM-4 Transmitter with Hybrid Sub-Sampling PLL in 28nm CMOS Technology. - Zhongkai Wang; Minsoo Choi 002; Paul Kwon; Kyoungtae Lee; Bozhi Yin; Zhaokai Liu; Kwanseo Park; Ayan Biswas; Jaeduk Han; Sijun Du; Elad Alon (VLSI Technology and Circuits, 2022)

An Eight-Core 1.44-GHz RISC-V Vector Processor in 16-nm FinFET. - Colin Schmidt 001; John Charles Wright; Zhongkai Wang; Eric Chang; Albert J. Ou; Woorham Bae; Sean Huang; Vladimir M. Milovanovic; Anita Flynn; Brian C. Richards; Krste Asanovic; Elad Alon; et al. (IEEE J. Solid State Circuits, 2022)

An Output Bandwidth Optimized 200-Gb/s PAM-4 100-Gb/s NRZ Transmitter With 5-Tap FFE in 28-nm CMOS. - Zhongkai Wang; Minsoo Choi 002; Kyoungtae Lee; Kwanseo Park; Zhaokai Liu; Ayan Biswas; Jaeduk Han; Sijun Du; Elad Alon (IEEE J. Solid State Circuits, 2022)

Accurate Statistical BER Analysis of DFE Error Propagation in the Presence of Residual ISI. - Kunmo Kim; Paul Kwon; Elad Alon (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

Precursor ISI Cancellation Sliding-Block DFE for High-Speed Wireline Receivers. - Kunmo Kim; Suhong Moon; Jaeduk Han; Elad Alon; Ali M. Niknejad (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

The MRDust: Wireless Data Uplink & Localization via Magnetic Resonance Image Modulation. - Biqi Rebekah Zhao; Alexander Chou; Robert Peltekov; Elad Alon; Chunlei Liu; Rikky Muller; Michael Lustig (EMBC, 2024)

A 24.6-29.6GHz Hybrid Sub-Sampling PLL with Tri-State Integral Path Achieving 44fs Jitter and -254.8dB FOM in 28nm CMOS. - Zhongkai Wang; Minsoo Choi 002; Paul Kwon; Zhaokai Liu; Bozhi Yin; Kyoungtae Lee; Kwanseo Park; Ayan Biswas; Jaeduk Han; Sijun Du; Elad Alon (ISCAS, 2024)

Power Integrity Analysis for Interoperability of BoW Chiplet Interfaces. - Ishan Mishra; Jayaprakash Balachandran; Wen-Sin Liew; Elad Alon; Srinivas Venkataraman; Shalabh Gupta (VLSID, 2024)

MRDust: Wireless Implant Data Uplink & Localization via Magnetic Resonance Image Modulation. - Biqi Rebekah Zhao; Alexander Chou; Robert Peltekov; Elad Alon; Chunlei Liu; Rikky Muller; Michael Lustig (CoRR, 2025)