REGGEN-Test pattern generation on register transfer level. - Andrej Magdolen; Jana Bezakova; Elena Gramatová; Mária Fischerová (EURO-DAC, 1993)

The MD5 Message-Digest Algorithm in the XILINX FPGA. - P. Gramata; P. Trebaticky; Elena Gramatová (FPL, 1994)

Hierarchical defect-oriented fault simulation for digital circuits. - Mykola Blyzniuk; T. Cibáková; Elena Gramatová; Wieslaw Kuzmicz; M. Lobur; Witold A. Pleskacz; Jaan Raik; Raimund Ubar (ETW, 2000)

Internet-Based Collaborative Test Generation with MOSCITO. - André Schneider; Karl-Heinz Diener; Eero Ivask; Jaan Raik; Raimund Ubar; P. Miklos; T. Cibáková; Elena Gramatová (DATE, 2002)

Integrated Design and Test Generation Under Internet Based Environment MOSCITO. - André Schneider; Karl-Heinz Diener; Eero Ivask; Raimund Ubar; Elena Gramatová; Thomas Hollstein; Wieslaw Kuzmicz; Zebo Peng (DSD, 2002)

Hierarchical test generation for combinational circuits with real defects coverage. - T. Cibáková; Mária Fischerová; Elena Gramatová; Wieslaw Kuzmicz; Witold A. Pleskacz; Jaan Raik; Raimund Ubar (Microelectron. Reliab., 2002)

Boolean Formalisation of the PMC Model for Faulty Units Diagnosis in Regular Multi-Processor Systems. - Miroslav Manik; Elena Gramatová (DDECS, 2008)

Diagnosis of faulty units in regular graphs under the PMC model. - Miroslav Manik; Elena Gramatová (DDECS, 2009)

Deductive Fault Simulation for Asynchronous Sequential Circuits. - Roland Dobai; Elena Gramatová (DSD, 2009)

Test pattern generation for the combinational representation of asynchronous circuits. - Roland Dobai; Elena Gramatová (DDECS, 2010)

Deductive Fault Simulation Technique for Asynchronous Circuits. - Roland Dobai; Elena Gramatová (Comput. Informatics, 2010)

Efficient diagnostics algorithms for regular computing structures. - Miroslav Manik; Elena Gramatová (DDECS, 2011)

A novel automatic test pattern generator for asynchronous sequential digital circuits. - Roland Dobai; Elena Gramatová (Microelectron. J., 2011)

D&T Presenter - electronic interactive system for design and test education. - Matej Hlatký; Valter Martinek; Elena Gramatová (DDECS, 2012)

Redundancy algorithm for embedded memories with block-based architecture. - Stefan Kristofík; Elena Gramatová (DDECS, 2013)

Delay Fault Coverage Increasing in Digital Circuits. - Miroslav Siebert; Elena Gramatová (DSD, 2013)

Parameterized Critical Path Selection for Delay Fault Testing. - Miroslav Siebert; Elena Gramatová (DDECS, 2015)

A new user-friendly ATPG platform for digital circuits. - Marek Lipovský; Ján Svarc; Elena Gramatová; Petr Fiser (DDECS, 2016)

A new method for path criticality calculation. - Róbert Tamási; Miroslav Siebert; Elena Gramatová; Petr Fiser (DDECS, 2016)