The effect of LUT and cluster size on deep-submicron FPGA performance and density. - Elias Ahmed; Jonathan Rose (IEEE Trans. Very Large Scale Integr. Syst., 2004)

The Stratix II logic and routing architecture. - David M. Lewis; Elias Ahmed; Gregg Baeckler; Vaughn Betz; Mark Bourgeault; David Cashman; David R. Galloway; Mike Hutton; Christopher Lane; Andy Lee; Paul Leventis; Sandy Marquardt; et al. (FPGA, 2005)

Architectural enhancements in Stratix-IIITM and Stratix-IVTM. - David M. Lewis; Elias Ahmed; David Cashman; Tim Vanderhoek; Christopher Lane; Andy Lee; Philip Pan (FPGA, 2009)