Emerging Yield and Reliability Challenges in Nanometer CMOS Technologies. - Georges G. E. Gielen; Pieter De Wit; Elie Maricau; Johan Loeckx; Javier Martín-Martínez; Ben Kaczer; Guido Groeseneken; Rosana Rodríguez; Montserrat Nafría (DATE, 2008)

An analytical model for hot carrier degradation in nanoscale CMOS suitable for the simulation of degradation in analog IC applications. - Elie Maricau; Pieter De Wit; Georges G. E. Gielen (Microelectron. Reliab., 2008)

Efficient reliability simulation of analog ICs including variability and time-varying stress. - Elie Maricau; Georges G. E. Gielen (DATE, 2009)

Panel: Realistic low power design: Let errors occur and correct them later or mitigate errors via design guardbanding and process control?. - Abhijit Chatterjee; Jacob A. Abraham; Adit D. Singh; Elie Maricau; Rakesh Kumar 002; Christos A. Papachristou (IOLTS, 2009)

A methodology for measuring transistor ageing effects towards accurate reliability simulation. - Elie Maricau; Georges G. E. Gielen (IOLTS, 2009)

Variability-aware reliability simulation of mixed-signal ICs with quasi-linear complexity. - Elie Maricau; Georges G. E. Gielen (DATE, 2010)

Design automation towards reliable analog integrated circuits. - Georges G. E. Gielen; Elie Maricau; Pieter De Wit (ICCAD, 2010)

Efficient Variability-Aware NBTI and Hot Carrier Circuit Reliability Analysis. - Elie Maricau; Georges G. E. Gielen (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010)

Analog circuit reliability in sub-32 nanometer CMOS: Analysis and mitigation. - Georges G. E. Gielen; Elie Maricau; Pieter De Wit (DATE, 2011)

Stochastic circuit reliability analysis. - Elie Maricau; Georges G. E. Gielen (DATE, 2011)

Transistor aging-induced degradation of analog circuits: Impact analysis and design guidelines. - Elie Maricau; Georges G. E. Gielen (ESSCIRC, 2011)

Impact analysis of stochastic transistor aging on current-steering DACs in 32nm CMOS. - Simon Vanden Bussche; Pieter De Wit; Elie Maricau; Georges G. E. Gielen (ICECS, 2011)

Computer-Aided Analog Circuit Design for Reliability in Nanometer CMOS. - Elie Maricau; Georges G. E. Gielen (IEEE J. Emerg. Sel. Topics Circuits Syst., 2011)

Designing reliable analog circuits in an unreliable world. - Georges G. E. Gielen; Elie Maricau; Pieter De Wit (CICC, 2012)

Advances in variation-aware modeling, verification, and testing of analog ICs. - Dimitri de Jonghe; Elie Maricau; Georges G. E. Gielen; Trent McConaghy; Bratislav Tasic; Haralampos-G. D. Stratigopoulos (DATE, 2012)

Hierarchical analog circuit reliability analysis using multivariate nonlinear regression and active learning sample selection. - Elie Maricau; Dimitri de Jonghe; Georges G. E. Gielen (DATE, 2012)

Offset measurement method for accurate characterization of BTI-induced degradation in opamps. - Swaraj Mahato; Pieter De Wit; Elie Maricau; Georges G. E. Gielen (ICECS, 2012)

Stochastic degradation modeling and simulation for analog integrated circuits in nanometer CMOS. - Georges G. E. Gielen; Elie Maricau (DATE, 2013)