A sensitivity analysis of a new hardware-supported Global Synchronization Unit. - Elizabeth Whitaker Lynch; George F. Riley (MASCOTS, 2009)

Hardware Supported Time Synchronization in Multi-core Architectures. - Elizabeth Whitaker Lynch; George F. Riley (PADS, 2009)

Timing Accurate Functional-Level Hardware Simulation with Pull Model Data Flow. - George F. Riley; Elizabeth Whitaker Lynch (MASCOTS, 2010)

Functional-Level Hardware Simulation with Pull-Model Data Flow. - George F. Riley; Brian Hayes; Elizabeth Whitaker Lynch (PADS, 2010)

Hardware acceleration for conservative parallel discrete event simulation on multi-core systems. - Elizabeth Whitaker Lynch (2011)