Design automation of testable finite state machines. - Maryna Miroschnyk; Yuriy Pakhomov; Edward German; Alexander Shkil; Elvira Kulak; Dariya Kucherenko (EWDTS, 2017)

Design of Logical Control Units Based on Finite State Machines' Patterns. - Maryna Miroshnyk; Sergii Poroshyn; Alexander Shkil; Elvira Kulak; Inna Filippenko; Dariia Kucherenko; Yuriy Pakhomov; Salfetnikova Juliia; Maksym Goga (EWDTS, 2018)

Design of Real-Time System Logic Control on FPGA. - Maryna Miroschnyk; Olexander Shkil; Elvira Kulak; Dariia Rakhlis; Inna Filippenko; Maksym Hoha; Mykyta Malakhov; Vladyslav Sergienko (EWDTS, 2019)

Verification of FPGA control systems by analyzing the correctness of state diagrams. - Maryna Miroshnyk; Alexander Shkil; Elvira Kulak; Dariia Rakhlis; Inna Filippenko; Anatolii Miroshnyk (DESSERT, 2020)

Hardware Implementation of Timed Logical Control FSM. - Maryna Miroschnyk; Alexander Shkil; Dariia Rakhlis; Elvira Kulak; Inna Filippenko; Mykyta Malakhov (EWDTS, 2020)