VHDL-AMS modeling of a multi-standard phase locked loop. - Benjamin Nicolle; Lionel Geynet; Emeric de Foucauld; William Tatinian; Gilles Jacquemod (ICECS, 2005)

An Ultra Low Power SoC for 2.4GHz IEEE802.15.4 wireless communications. - Carolynn Bernier; Frédéric Hameau; Gérard Billiot; Emeric de Foucauld; Stéphanie Robinet; Didier Lattard; Jean Durupt; Francois Dehmas; Laurent Ouvry; Pierre Vincent (ESSCIRC, 2008)

Utilization of MEMS Tunable Inductors in the design of RF voltage-controlled oscillators. - Owen Casha; Ivan Grech; Joseph Micallef; Edward Gatt; Dominique Morche; Bernard Viala; Jean-Philippe Michel; Pierre Vincent; Emeric de Foucauld (ICECS, 2008)

Design and modelling of a multi-standard fractional PLL in CMOS/SOI technology. - Gilles Jacquemod; Lionel Geynet; Benjamin Nicolle; Emeric de Foucauld; William Tatinian; Pierre Vincent (Microelectron. J., 2008)

A power optimized transconductance amplifier and its application to a 6th order lowpass GmC filter. - Francis Chan Wai Po; Emeric de Foucauld; Dominique Morche; Pierre Vincent; Renzo Dal Molin; Pascal Pons; Regis Pierquin; Eric Kerherve (ICECS, 2009)

A Fast and Accurate Automatic Matching Network Designed for Ultra Low Power Medical Applications. - Wai Chan; Emeric de Foucauld; Pierre Vincent; Frédéric Hameau; Dominique Morche; Christophe Delaveaud; Renzo Dal Molin; Pascal Pons; Regis Pierquin; Eric Kerherve (ISCAS, 2009)

An antenna-filter codesign for cardiac implants. - Emeric de Foucauld; Jean-Baptiste David; Christophe Delaveaud; Pascal Ciais (DATE, 2011)

Design of a RF matching network based on a new tunable inductor concept. - Mouna El Bakkali; Francis Chan Wai Po; Emeric de Foucauld; Bernard Viala; Jean-Philippe Michel (Microelectron. J., 2011)

A Novel Method for Synthesizing an Automatic Matching Network and Its Control Unit. - Francis Chan Wai Po; Emeric de Foucauld; Dominique Morche; Pierre Vincent; Eric Kerherve (IEEE Trans. Circuits Syst. I Regul. Pap., 2011)

A frequency measurement BIST implementation targeting gigahertz application. - Matthieu Dubois; Emeric de Foucauld; Christopher Mounet; Serigne Dia; Cedric Mayor (ITC, 2012)

Cost-driven statistical analysis for selection of alternative measurements of analog circuits. - Matthieu Verdy; Alin Ratiu; Dominique Morche; Emeric de Foucauld; Suzanne Lesecq; Jean-Pascal Mallet; Cedric Mayor (ICECS, 2014)

Robust BER estimator for DBPSK modulation. - Thierry Bonnoit; Dominique Morche; Cedric Dehos; Emeric de Foucauld (NEWCAS, 2014)

VCO design in SOI technologies. - Alexandre Fonseca; Gilles Jacquemod; Yves Leduc; Emeric de Foucauld; Philippe Lorenzini (NEWCAS, 2014)

Low Power 28 nm Fully Depleted Silicon on Insulator 2.45 GHz Phase Locked Loop. - Alexandre Fonseca; Emeric de Foucauld; Philippe Lorenzini; Gilles Jacquemod (J. Low Power Electron., 2014)

Balancing test cost reduction vs. measurements accuracy at test time. - Matthieu Verdy; Dominique Morche; Emeric de Foucauld; Suzanne Lesecq; Jean-Pascal Mallet; Cedric Mayor (NEWCAS, 2015)

Parametric Built-In Test for 65nm RF LNA Using Non-Intrusive Variation-Aware Sensors. - Athanasios Dimakos; Haralampos-G. D. Stratigopoulos; Alexandre Siligaris; Salvador Mir; Emeric de Foucauld (J. Electron. Test., 2015)

Built-in test of millimeter-Wave circuits based on non-intrusive sensors. - Athanasios Dimakos; Haralampos-G. D. Stratigopoulos; Alexandre Siligaris; Salvador Mir; Emeric de Foucauld (DATE, 2016)

UTBB-FDSOI complementary logic for high quality analog signal processing. - Zhaopeng Wei; Yves Leduc; Gilles Jacquemod; Emeric de Foucauld (ICECS, 2016)

Study and Reduction of Variability in 28 nm Fully Depleted Silicon on Insulator Technology. - Zhaopeng Wei; Gilles Jacquemod; Philippe Lorenzini; Frédéric Hameau; Emeric de Foucauld; Yves Leduc (J. Low Power Electron., 2016)

Novel building blocks for PLL using complementary logic in 28nm UTBB-FDSOI technology. - Zhaopeng Wei; Yves Leduc; Emeric de Foucauld; Gilles Jacquemod (NEWCAS, 2017)

New design of analog and mixed-signal cells using back-gate cross-coupled structure. - Gilles Jacquemod; Zhaopeng Wei; Yves Leduc; Emeric de Foucauld; Jérôme Prouvée; B. Blampey (VLSI-SoC, 2019)

A 433-MHz SOI CMOS Automatic Impedance Matching Circuit. - Emeric de Foucauld; Raffaele Roberto Severino; Dominique Nicolas; Alexandre Giry; Christophe Delaveaud (IEEE Trans. Circuits Syst. II Express Briefs, 2019)