Power reduction through work reuse. - Emil Talpes; Diana Marculescu (ISLPED, 2001)

A critical analysis of application-adaptive multiple clock processors. - Emil Talpes; Diana Marculescu (ISLPED, 2003)

Mixed-clock issue queue design for energy aware, high-performance cores. - Venkata Syam P. Rapaka; Emil Talpes; Diana Marculescu (ASP-DAC, 2004)

Impact of technology scaling on energy aware execution cache-based microarchitectures. - Emil Talpes; Diana Marculescu (ISLPED, 2004)

Variability and energy awareness: a microarchitecture-level perspective. - Diana Marculescu; Emil Talpes (DAC, 2005)

Increased Scalability and Power Efficiency by Using Multiple Speed Pipelines. - Emil Talpes; Diana Marculescu (ISCA, 2005)

Energy Awareness and Uncertainty in Microarchitecture-Level Design. - Diana Marculescu; Emil Talpes (IEEE Micro, 2005)

Execution cache-based microarchitecture for power-efficient superscalar processors. - Emil Talpes; Diana Marculescu (IEEE Trans. Very Large Scale Integr. Syst., 2005)

Toward a multiple clock/voltage island design style for power-aware processors. - Emil Talpes; Diana Marculescu (IEEE Trans. Very Large Scale Integr. Syst., 2005)

Computer and Redundancy Solution for the Full Self-Driving Computer. - Pete Bannon; Ganesh Venkataramanan; Debjit Das Sarma; Emil Talpes (Hot Chips Symposium, 2019)

Compute Solution for Tesla's Full Self-Driving Computer. - Emil Talpes; Atchyuth Gorti; Gagandeep S. Sachdev; Debjit Das Sarma; Ganesh Venkataramanan; Peter Bannon; Bill McGee; Benjamin Floering; Ankit Jalote; Christopher Hsiong; Sahil Arora (IEEE Micro, 2020)

DOJO: The Microarchitecture of Tesla's Exa-Scale Computer. - Emil Talpes; Douglas Williams; Debjit Das Sarma (HCS, 2022)

The Microarchitecture of DOJO, Tesla's Exa-Scale Computer. - Emil Talpes; Debjit Das Sarma; Douglas Williams; Sahil Arora; Thomas Kunjan; Benjamin Floering; Ankit Jalote; Christopher Hsiong; Chandrasekhar Poorna; Vaidehi Samant; John Sicilia; Anantha Kumar Nivarti; et al. (IEEE Micro, 2023)