On the selection of efficient arithmetic additive test pattern generators [logic test]. - Salvador Manich; L. García; Luz Balado; Emili Lupon; Josep Rius 001; Rosa Rodríguez-Montañés; Joan Figueras (ETW, 2003)

Digital, Memory and Mixed-Signal Test Engineering Education: Five Centres of Competence in Europ. - Marie-Lise Flottes; Yves Bertrand; Luz Balado; Emili Lupon; Anton Biasizzo; Franc Novak; Stefano Di Carlo; Paolo Prinetto; Nicoleta Pricopi; Hans-Joachim Wunderlich (DELTA, 2004)

BIST Technique by Equally Spaced Test Vector Sequences. - Salvador Manich; L. García; Luz Balado; Emili Lupon; Josep Rius 001; Rosa Rodríguez-Montañés; Joan Figueras (VTS, 2004)

Lissajous Based Mixed-Signal Testing for N-Observable Signals. - Luz Balado; Emili Lupon; L. García; Rosa Rodríguez-Montañés; Joan Figueras (DDECS, 2006)

Verifying Functional Specifications by Regression Techniques on Lissajous Test Signatures. - Luz Balado; Emili Lupon; Joan Figueras; Miquel Roca 001; Eugeni Isern 001; Rodrigo Picos (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

FPGA Implementation of a PWM for a Three-Phase DC-AC Multilevel Active-Clamped Converter. - Emili Lupon; Sergio Busquets-Monge; Joan Nicolas-Apruzzese (IEEE Trans. Ind. Informatics, 2014)

Enhanced DC-Link Capacitor Voltage Balancing Control of DC-AC Multilevel Multileg Converters. - Sergio Busquets-Monge; Ramkrishan Maheshwari; Joan Nicolas-Apruzzese; Emili Lupon; Stig Munk-Nielsen; Josep Bordonau (IEEE Trans. Ind. Electron., 2015)

A Calibratable Detector for Invasive Attacks. - Michael Weiner 004; Wolfgang Wieser; Emili Lupon; Georg Sigl; Salvador Manich (IEEE Trans. Very Large Scale Integr. Syst., 2019)

Indirect and adaptive test of analogue circuits based on preselected steady-state response measures. - Álvaro Gómez-Pau; Emili Lupon; Luz Balado; Joan Figueras (IET Circuits Devices Syst., 2020)