Simplified Deep-Learning-based decoders for linear block codes. - Emmanouil Kavvousanos; Vassilis Paliouras; Ioannis Kouretas (ICECS, 2018)

Hardware Implementation Aspects of a Syndrome-based Neural Network Decoder for BCH Codes. - Emmanouil Kavvousanos; Vassilis Paliouras (NORCAS, 2019)

An Iterative Approach to Syndrome-based Deep Learning Decoding. - Emmanouil Kavvousanos; Vassilis Paliouras (GLOBECOM (Workshops), 2020)

Optimizing Deep Learning Decoders for FPGA Implementation. - Emmanouil Kavvousanos; Vassilis Paliouras (FPL, 2021)

A Low-Latency Syndrome-based Deep Learning Decoder Architecture and its FPGA Implementation. - Emmanouil Kavvousanos; Vassilis Paliouras (MOCAST, 2022)

Improving Residue-Level Sparsity in RNS-based Neural Network Hardware Accelerators via Regularization. - Emmanouil Kavvousanos; Vasilis Sakellariou; Ioannis Kouretas; Vassilis Paliouras; Thanos Stouraitis (ARITH, 2023)

A Regularization Approach to Maximize Common Sub-Expressions in Neural Network Weights. - Emmanouil Kavvousanos; Ioannis Kouretas; Vassilis Paliouras; Thanos Stouraitis (ICECS, 2023)