A Symbolic Relation for a Subset of VHDL'87 Descriptions and its Application to Symbolic Model Checking. - Emmanuelle Encrenaz (CHARME, 1995)

A Tool for Translation of VHDL Descriptions into a Formal Model and its Application to Formal Verification and Synthesis. - Rajesh K. Bawa; Emmanuelle Encrenaz (FTRTFT, 1996)

Modular model checking of VLSI designs described in VHDL. - Fahim Rahim-Sarwary; Emmanuelle Encrenaz; Michel Minoux; Rajesh K. Bawa (CATA, 1998)

Data Decision Diagrams for Petri Net Analysis. - Jean-Michel Couvreur; Emmanuelle Encrenaz; Emmanuel Paviot-Adet; Denis Poitrenaud; Pierre-André Wacrenier (ICATPN, 2002)

Design Validation of ZCSP with SPIN. - Vincent Beaudenon; Emmanuelle Encrenaz; Jean Lou Desbarbieux (ACSD, 2003)

CTL May Be Ambiguous When Model Checking Moore Machines. - Cédric Roux; Emmanuelle Encrenaz (CHARME, 2003)

Verification of the Generic Architecture of a Memory Circuit Using Parametric Timed Automata. - Remy Chevallier; Emmanuelle Encrenaz-Tiphène; Laurent Fribourg; Weiwen Xu (FORMATS, 2006)

A Tool for Automatic Detection of Deadlock in Wormhole Networks on Chip. - Sami Taktak; Emmanuelle Encrenaz; Jean Lou Desbarbieux (HLDVT, 2006)

Formalizing the Incremental Design and Verification Process of a Pipelined Protocol Converter. - Cécile Braunstein; Emmanuelle Encrenaz (IEEE International Workshop on Rapid System Prototyping, 2006)

Time Separation of Events: An Inverse Method. - Emmanuelle Encrenaz; Laurent Fribourg (LIX, 2006)

Using CTL formulae as component abstraction in a design and verification flow. - Cécile Braunstein; Emmanuelle Encrenaz (ACSD, 2007)

CTL-property Transformations along an Incremental Design Process. - Cécile Braunstein; Emmanuelle Encrenaz (Int. J. Softw. Tools Technol. Transf., 2007)

An Inverse Method for Parametric Timed Automata. - Étienne André; Thomas Chatain; Laurent Fribourg; Emmanuelle Encrenaz (RP, 2008)

Complementary Formal Approaches for Dependability Analysis. - Souheib Baarir; Cécile Braunstein; Renaud Clavel; Emmanuelle Encrenaz; Jean-Michel Ilié; Régis Leveugle; Isabelle Mounier; Laurence Pierre; Denis Poitrenaud (DFT, 2009)

Automatic Verification of Counter Systems With Ranking Function. - Emmanuelle Encrenaz; Alain Finkel (INFINITY, 2009)

Timed verification of the generic architecture of a memory circuit using parametric timed automata. - Remy Chevallier; Emmanuelle Encrenaz-Tiphène; Laurent Fribourg; Weiwen Xu (Formal Methods Syst. Des., 2009)

Formal Verification of Timed VHDL Programs. - Abdelrezzak Bara; Pirouz Bazargan-Sabet; Remy Chevallier; Dominique Le Dû; Emmanuelle Encrenaz; Patricia Renault (FDL, 2010)

A Polynomial Algorithm to Prove Deadlock-Freeness of Wormhole Networks. - Sami Taktak; Emmanuelle Encrenaz; Jean Lou Desbarbieux (PDP, 2010)

Data decision diagrams for Promela systems analysis. - Vincent Beaudenon; Emmanuelle Encrenaz; Sami Taktak (Int. J. Softw. Tools Technol. Transf., 2010)

Feasibility analysis for robustness quantification by symbolic model checking. - Souheib Baarir; Cécile Braunstein; Emmanuelle Encrenaz; Jean-Michel Ilié; Isabelle Mounier; Denis Poitrenaud; Sana Younès (Formal Methods Syst. Des., 2011)

An efficient refinement strategy exploiting component properties in a cegar process. - Syed Hussein Syed Alwi; Cécile Braunstein; Emmanuelle Encrenaz (FDL, 2012)

Efficient Refinement Strategy Exploiting Component Properties in a CEGAR Process. - Syed Hussein Syed Alwi; Cécile Braunstein; Emmanuelle Encrenaz (FDL (Selected Papers), 2012)

A Formally Verified Static Hypervisor with Hardware Support for a Many-Core Chip. - Geoffrey Plouviez; Emmanuelle Encrenaz; Franck Wajsbürt (Euro-Par Workshops, 2013)

Verification of heterogeneous systems: Theory and industrial experiences. - Christoph Grimm 001; Emmanuelle Encrenaz (FDL, 2013)

Assisting refinement in System-on-Chip design. - Hocine Mokrani; Rabéa Ameur-Boulifa; Emmanuelle Encrenaz-Tiphène (FDL, 2013)

Electromagnetic Fault Injection: Towards a Fault Model on a 32-bit Microcontroller. - Nicolas Moro; Amine Dehbaoui; Karine Heydemann; Bruno Robisson; Emmanuelle Encrenaz (FDTC, 2013)

Experimental evaluation of two software countermeasures against fault attacks. - Nicolas Moro; Karine Heydemann; Amine Dehbaoui; Bruno Robisson; Emmanuelle Encrenaz (HOST, 2014)

Mutation Based Feature Localization. - Jan Malburg; Emmanuelle Encrenaz-Tiphène; Görschwin Fey (MTV, 2014)

FSM-based properties and abstraction of components. - Syed Hussein Syed Alwi; Emmanuelle Encrenaz (RSP, 2014)

Formal verification of a software countermeasure against instruction skip attacks. - Nicolas Moro; Karine Heydemann; Emmanuelle Encrenaz; Bruno Robisson (J. Cryptogr. Eng., 2014)

Efficient Design and Evaluation of Countermeasures against Fault Attacks Using Formal Verification. - Lucien Goubet; Karine Heydemann; Emmanuelle Encrenaz; Ronald De Keulenaer (CARDIS, 2015)

Symbolic Approach for Side-Channel Resistance Analysis of Masked Assembly Codes. - Inès Ben El Ouahma; Quentin L. Meunier; Karine Heydemann; Emmanuelle Encrenaz (PROOFS, 2017)

Modeling a Cache Coherence Protocol with the Guarded Action Language. - Quentin L. Meunier; Yann Thierry-Mieg; Emmanuelle Encrenaz (MARS/VPT@ETAPS, 2018)

Side-channel robustness analysis of masked assembly codes using a symbolic approach. - Inès Ben El Ouahma; Quentin L. Meunier; Karine Heydemann; Emmanuelle Encrenaz (J. Cryptogr. Eng., 2019)

Blind-Folded: Simple Power Analysis Attacks using Data with a Single Trace and no Training. - Xunyue Hu; Quentin L. Meunier; Emmanuelle Encrenaz (IACR Cryptol. ePrint Arch., 2024)