45% Power Saving in a 0.25μm BiCMOS 10Gb/s 50Ω-Terminated Packaged Active-Load Laser Driver. - Emre Ayranci; Kenn Christensen; Pietro Andreani (ISSCC, 2007)

A 12b 2.9GS/s DAC with IM3 ≪-60dBc beyond 1GHz in 65nm CMOS. - Chi-Hung Lin; Frank M. L. van der Goes; Jan R. Westra; Jan Mulder; Yu Lin; Erol Arslan; Emre Ayranci; Xiaodong Liu; Klaas Bult (ISSCC, 2009)

A 12 bit 2.9 GS/s DAC With IM3 ≪ -60 dBc Beyond 1 GHz in 65 nm CMOS. - Chi-Hung Lin; Frank M. L. van der Goes; Jan R. Westra; Jan Mulder; Yu Lin; Erol Arslan; Emre Ayranci; Xiaodong Liu; Klaas Bult (IEEE J. Solid State Circuits, 2009)

An 800MS/s dual-residue pipeline ADC in 40nm CMOS. - Jan Mulder; Frank M. L. van der Goes; Davide Vecchi; Jan R. Westra; Emre Ayranci; Christopher M. Ward; Jiansong Wan; Klaas Bult (ISSCC, 2011)

An 800 MS/s Dual-Residue Pipeline ADC in 40 nm CMOS. - Davide Vecchi; Jan Mulder; Frank M. L. van der Goes; Jan R. Westra; Emre Ayranci; Christopher M. Ward; Jiansong Wan; Klaas Bult (IEEE J. Solid State Circuits, 2011)