New layout generator for analog CMOS circuits. - Ender Yilmaz; Günhan Dündar (ECCTD, 2007)

Dynamic test scheduling for analog circuits for improved test quality. - Ender Yilmaz; Sule Ozev (ICCD, 2008)

Adaptive test elimination for analog/RF circuits. - Ender Yilmaz; Sule Ozev (DAC, 2009)

Defect-based test optimization for analog/RF circuits for near-zero DPPM applications. - Ender Yilmaz; Sule Ozev (ICCD, 2009)

Built-in EVM measurement for OFDM transceivers using all-digital DFT. - Ender Yilmaz; Afsaneh Nassery; Sule Ozev; Erkan Acar (ITC, 2009)

Analog Layout Generator for CMOS Circuits. - Ender Yilmaz; Günhan Dündar (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009)

Accurate multi-specification DPPM estimation using layered sampling based simulation. - Ender Yilmaz (ISQED, 2010)

Adaptive test flow for mixed-signal/RF circuits using learned information from device under test. - Ender Yilmaz; Sule Ozev; Kenneth M. Butler (ITC, 2010)

Fast and Accurate DPPM Computation Using Model Based Filtering. - Ender Yilmaz; Sule Ozev (ETS, 2011)

Adaptive multidimensional outlier analysis for analog and mixed signal circuits. - Ender Yilmaz; Sule Ozev; Kenneth M. Butler (ITC, 2011)

An industrial case study of analog fault modeling. - Ender Yilmaz; Anne Meixner; Sule Ozev (VTS, 2011)

Adaptive multi-site testing for analog/mixed-signal circuits incorporating neighborhood information. - Ender Yilmaz; Sule Ozev (ETS, 2012)

Adaptive testing: Conquering process variations. - Ender Yilmaz; Sule Ozev; Ozgur Sinanoglu; Peter C. Maxwell (ETS, 2012)

Test Application for Analog/RF Circuits With Low Computational Burden. - Ender Yilmaz; Sule Ozev (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012)

Electrical calibration of spring-mass MEMS capacitive accelerometers. - Lingfei Deng; Vinay Kundur; Naveen Sai Jangala Naga; Muhlis Kenan Ozel; Ender Yilmaz; Sule Ozev; Bertan Bakkaloglu; Sayfe Kiaei; Divya Pratab; Tehmoor Dar (DATE, 2013)

Adaptive reduction of the frequency search space for multi-vdd digital circuits. - Chandra K. H. Suresh; Ender Yilmaz; Sule Ozev; Ozgur Sinanoglu (DATE, 2013)

Fault analysis and simulation of large scale industrial mixed-signal circuits. - Ender Yilmaz; Geoff Shofner; LeRoy Winemberg; Sule Ozev (DATE, 2013)

Adaptive quality binning for analog circuits. - Ender Yilmaz; Sule Ozev; Kenneth M. Butler (ETS, 2013)

Efficient Process Shift Detection and Test Realignment. - Ender Yilmaz; Sule Ozev; Kenneth M. Butler (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013)

Per-Device Adaptive Test for Analog/RF Circuits Using Entropy-Based Process Monitoring. - Ender Yilmaz; Sule Ozev; Kenneth M. Butler (IEEE Trans. Very Large Scale Integr. Syst., 2013)

Built-In EVM Measurement With Negligible Hardware Overhead. - Ender Yilmaz; Afsaneh Nassery; Sule Ozev (IEEE Des. Test, 2014)

Adaptive-Learning-Based Importance Sampling for Analog Circuit DPPM Estimation. - Ender Yilmaz; Sule Ozev (IEEE Des. Test, 2015)

Evaluation of loop transfer function based dynamic testing of LDOs. - Mehmet Ince; Ender Yilmaz; Jae Woong Jeong; LeRoy Winemberg; Sule Ozev (ITC-Asia, 2017)

Built-in self-test for stability measurement of low dropout regulator. - Jae Woong Jeong; Ender Yilmaz; LeRoy Winemberg; Sule Ozev (ITC, 2017)

Design of aging aware 5 Gbps LVDS transmitter for automotive applications. - Srikanth Jagannathan; Kumar Abhishek; Nihaar N. Mahatme; Ender Yilmaz (IRPS, 2018)

Enabling fast process variation and fault simulation through macromodelling of analog components. - Mehmet Ince; Ender Yilmaz; Sule Ozev (NATW, 2018)

Online information utility assessment for per-device adaptive test flow. - Yanjun Li; Ender Yilmaz; Peter Sarson; Sule Ozev (VTS, 2018)

Digital Built-in Self-Test for Phased Locked Loops to Enable Fault Detection. - Mehmet Ince; Ender Yilmaz; Wei Fu; Joonsung Park; Krishnaswamy Nagaraj; LeRoy Winemberg; Sule Ozev (ETS, 2019)

Adaptive Test for RF/Analog Circuit Using Higher Order Correlations among Measurements. - Yanjun Li; Ender Yilmaz; Pete Sarson; Sule Ozev (ACM Trans. Design Autom. Electr. Syst., 2019)

Fault-based Built-in Self-test and Evaluation of Phase Locked Loops. - Mehmet Ince; Ender Yilmaz; Wei Fu; Joonsung Park; Krishnaswamy Nagaraj; LeRoy Winemberg; Sule Ozev (ACM Trans. Design Autom. Electr. Syst., 2021)