RVC-CAL dataflow implementations of MPEG AVC/H.264 CABAC decoding. - Endri Bezati; Marco Mattavelli; Mickaël Raulet (DASIP, 2010)

A unified hardware/software co-synthesis solution for signal processing systems. - Endri Bezati; Hervé Yviquel; Mickaël Raulet; Marco Mattavelli (DASIP, 2011)

Hardware/software co-design of dataflow programs for reconfigurable hardware and multi-core platforms. - Ghislain Roquier; Endri Bezati; Richard Thavot; Marco Mattavelli (DASIP, 2011)

Design space exploration strategies for FPGA implementation of signal processing systems using CAL dataflow program. - Ab Al-Hadi Ab Rahman; Richard Thavot; Simone Casale Brunet; Endri Bezati; Marco Mattavelli (DASIP, 2012)

Hardware and Software Synthesis of Heterogeneous Systems from Dataflow Programs. - Ghislain Roquier; Endri Bezati; Marco Mattavelli (J. Electr. Comput. Eng., 2012)

Multi-clock domain optimization for reconfigurable architectures in high-level dataflow applications. - Simone Casale Brunet; Endri Bezati; Claudio Alberti; Marco Mattavelli; Edoardo Amaldi; Jörn W. Janneck (ACSSC, 2013)

Design space exploration and implementation of RVC-CAL applications using the TURNUS framework. - Simone Casale Brunet; Endri Bezati; Claudio Alberti; Ghislain Roquier; Marco Mattavelli; Jörn W. Janneck; Jani Boutellier (DASIP, 2013)

High-level synthesis of dataflow programs for signal processing systems. - Endri Bezati; Marco Mattavelli; Jörn W. Janneck (ISPA, 2013)

Live demonstration: High level software and hardware synthesis of dataflow programs. - Endri Bezati; Ghislain Roquier; Marco Mattavelli (ISCAS, 2013)

Partitioning and optimization of high level stream applications for multi clock domain architectures. - Simone Casale Brunet; Endri Bezati; Claudio Alberti; Marco Mattavelli; Edoardo Amaldi; Jörn W. Janneck (SiPS, 2013)

Methods to explore design space for MPEG RMC codec specifications. - Simone Casale Brunet; Abdallah Elguindy; Endri Bezati; Richard Thavot; Ghislain Roquier; Marco Mattavelli; Jörn W. Janneck (Signal Process. Image Commun., 2013)

Dataflow machines. - Jörn W. Janneck; Gustav Cedersjö; Endri Bezati; Simone Casale Brunet (ACSSC, 2014)

Execution trace graph analysis of dataflow programs: Bounded buffer scheduling and deadlock recovery using model predictive control. - Simone Casale Brunet; Endri Bezati; Marco Mattavelli; Massimo Canale; Jörn W. Janneck (DASIP, 2014)

TURNUS: An open-source design space exploration framework for dynamic stream programs. - Simone Casale Brunet; M. Wiszniewska; Endri Bezati; Marco Mattavelli; Jörn W. Janneck; Massimo Canale (DASIP, 2014)

Automated design flow for coarse-grained reconfigurable platforms: An RVC-CAL multi-standard decoder use-case. - Carlo Sau; Luigi Raffo; Francesca Palumbo; Endri Bezati; Simone Casale Brunet; Marco Mattavelli (ICSAMOS, 2014)

Dataflow programs analysis and optimization using model predictive control techniques: An example of bounded buffer scheduling. - Massimo Canale; Simone Casale Brunet; Endri Bezati; Marco Mattavelli; Jörn W. Janneck (SiPS, 2014)

High-level dataflow design of signal processing systems for reconfigurable and multicore heterogeneous platforms. - Endri Bezati; Richard Thavot; Ghislain Roquier; Marco Mattavelli (J. Real Time Image Process., 2014)

Execution Trace Graph Based Multi-criteria Partitioning of Stream Programs. - Malgorzata Michalska; Simone Casale Brunet; Endri Bezati; Marco Mattavelli (ICCS, 2015)

Synthesis and Optimization of Pipelines for HW Implementations of Dataflow Programs. - Anatoly Prihozhy; Endri Bezati; Ab Al-Hadi Ab Rahman; Marco Mattavelli (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015)

High-level system synthesis and optimization of dataflow programs for MPSoCs. - Endri Bezati; Simone Casale Brunet; Marco Mattavelli; Jörn W. Janneck (ACSSC, 2016)

Trace-based manycore partitioning of stream-processing applications. - Malgorzata Michalska; Simone Casale Brunet; Endri Bezati; Marco Mattavelli; Jörn W. Janneck (ACSSC, 2016)

A Partition Scheduler Model for Dynamic Dataflow Programs. - Malgorzata Michalska; Endri Bezati; Simone Casale Brunet; Marco Mattavelli (ICCS, 2016)

Programming Models and Methods for Heterogeneous Parallel Embedded Systems. - Simone Casale Brunet; Endri Bezati; Marco Mattavelli (MCSoC, 2016)

High-Precision Performance Estimation of Dynamic Dataflow Programs. - Malgorzata Michalska; Simone Casale Brunet; Endri Bezati; Marco Mattavelli (MCSoC, 2016)

Design Space Exploration Problem Formulation for Dataflow Programs on Heterogeneous Architectures. - Malgorzata Michalska; Nicolas Zufferey; Endri Bezati; Marco Mattavelli (MCSoC, 2016)

Performance estimation of program partitions on multi-core platforms. - Malgorzata Michalska; J. J. Ahmad; Endri Bezati; Simone Casale Brunet; Marco Mattavelli (PATMOS, 2016)

High-level synthesis of dynamic dataflow programs on heterogeneous MPSoC platforms. - Endri Bezati; Simone Casale Brunet; Marco Mattavelli; Jörn W. Janneck (SAMOS, 2016)

Dataflow Programs Analysis and Optimization Using Model Predictive Control Techniques - Two Examples of Bounded Buffer Scheduling: Deadlock Avoidance and Deadlock Recovery Strategies. - Massimo Canale; Simone Casale Brunet; Endri Bezati; Marco Mattavelli; Jörn W. Janneck (J. Signal Process. Syst., 2016)

Automated Design Flow for Multi-Functional Dataflow-Based Platforms. - Carlo Sau; Paolo Meloni; Luigi Raffo; Francesca Palumbo; Endri Bezati; Simone Casale Brunet; Marco Mattavelli (J. Signal Process. Syst., 2016)

Execution trace graph based interface synthesis of signal processing dataflow programs for heterogeneous MPSoCs. - Endri Bezati; Simone Casale Brunet; Marco Mattavelli (ACSSC, 2017)

Profiling of dynamic dataflow programs on MPSoC multi-core architectures. - Simone Casale Brunet; Endri Bezati; Aurelien Bloch; Marco Mattavelli (ACSSC, 2017)

Buffer dimensioning for throughput improvement of dynamic dataflow signal processing applications on multi-core platforms. - Malgorzata Michalska; Endri Bezati; Simone Casale Brunet; Marco Mattavelli (EUSIPCO, 2017)

High level synthesis of Smith-Waterman dataflow implementations. - Simone Casale Brunet; Endri Bezati; Marco Mattavelli (ICASSP, 2017)

Design space exploration of dataflow-based Smith-Waterman FPGA implementations. - Simone Casale Brunet; Endri Bezati; Marco Mattavelli (SiPS, 2017)

Clock-Gating of Streaming Applications for Energy Efficient Implementations on FPGAs. - Endri Bezati; Simone Casale Brunet; Marco Mattavelli; Jörn W. Janneck (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017)

Towards in the Field Fast Pathogens Detection Using FPGAs. - Simone Casale Brunet; Thierry Schüpbach; Nicolas Guex; Christian Iseli; Alan J. Bridge; Dmitry Kuznetsov; Christian J. A. Sigrist; Phillippe Lemercier; Ioannis Xenarios; Endri Bezati (FPL, 2018)

Shared-variable Synchronization Approaches for Dynamic Data Flow Programs. - Apostolos Modas; Simone Casale Brunet; Robert J. Stewart 001; Endri Bezati; Junaid Jameel Ahmad; Marco Mattavelli (SiPS, 2018)

Efficient Dynamic Optimisation Heuristics for Dataflow Pipelines. - Anatoly Prihozhy; Simone Casale Brunet; Endri Bezati; Marco Mattavelli (SiPS, 2018)

High-Precision Performance Estimation for the Design Space Exploration of Dynamic Dataflow Programs. - Malgorzata Michalska; Simone Casale Brunet; Endri Bezati; Marco Mattavelli (IEEE Trans. Multi Scale Comput. Syst., 2018)

An Heterogeneous Compiler of Dataflow Programs for Zynq Platforms. - Endri Bezati; Simone Casale Brunet; Romuald Mosqueron; Marco Mattavelli (ICASSP, 2019)

Composite Data Types in Dynamic Dataflow Languages as Copyless Memory Sharing Mechanism. - Aurelien Bloch; Endri Bezati; Marco Mattavelli (ICCS (5), 2019)

Dataflow-based Heterogeneous Code Generator for IoT Applications. - Gábor Paller; Endri Bezati; Nebojsa Tausan; Gabor Farkas; Gábor Élö (MODELSWARD, 2019)

Advanced Dataflow Programming using Actor Machines for High-Level Synthesis. - Endri Bezati; Mahyar Emami; James R. Larus (FPGA, 2020)

Programming Heterogeneous CPU-GPU Systems by High-Level Dataflow Synthesis. - Aurelien Bloch; Endri Bezati; Marco Mattavelli (SiPS, 2020)

Pipeline Synthesis and Optimization from Branched Feedback Dataflow Programs. - Anatoly Prihozhy; Simone Casale Brunet; Endri Bezati; Marco Mattavelli (J. Signal Process. Syst., 2020)

Triggered Scheduling: Efficient Detection of Dataflow Network Idleness on Heterogeneous Systems. - Mahyar Emami; Endri Bezati; Jörn W. Janneck; James R. Larus (FPGA, 2021)

Generating hardware and software for RISC-V cores generated with Rocket Chip generator. - Süleyman Savas; Endri Bezati; Jörn W. Janneck (SoCC, 2021)

StreamBlocks: A compiler for heterogeneous dataflow computing (technical report). - Endri Bezati; Mahyar Emami; Jörn W. Janneck; James R. Larus (CoRR, 2021)

Auto-Partitioning Heterogeneous Task-Parallel Programs with StreamBlocks. - Mahyar Emami; Endri Bezati; Jörn W. Janneck; James R. Larus (PACT, 2022)

ART: An Actor transition systems RunTime for enabling efficient partitioning of neural network graphs. - Endri Bezati (CODAI, 2023)

Optimal tables for asymmetric numeral systems. - Raphael S. Steiner; Mirko De Vita; Endri Bezati (CoRR, 2025)