High throughput low-density parity-check decoder architectures. - Engling Yeo; Payam Pakzad; Borivoje Nikolic; Venkat Anantharam (GLOBECOM, 2001)

A design environment for high-throughput low-power dedicated signal processing systems. - W. Rhett Davis; Ning Zhang; Kevin Camera; Dejan Markovic; Tina Smilkstein; M. Josie Ammer; Engling Yeo; Stephanie Augsburger; Borivoje Nikolic; Robert W. Brodersen (IEEE J. Solid State Circuits, 2002)

Iterative decoder architectures. - Engling Yeo; Venkat Anantharam (IEEE Commun. Mag., 2003)

A 500-Mb/s soft-output Viterbi decoder. - Engling Yeo; Stephanie Augsburger; W. Rhett Davis; Borivoje Nikolic (IEEE J. Solid State Circuits, 2003)

Low-density parity-check code constructions for hardware implementation. - Edward Liao; Engling Yeo; Borivoje Nikolic (ICC, 2004)