A 5.2mW ku-band CMOS injection-locked frequency doubler with differential input / output. - Enrico Monaco; Mattia Borgarino; Francesco Svelto; Andrea Mazzanti (CICC, 2009)

A 13.1% tuning range 115GHz frequency generator based on an injection-locked frequency doubler in 65nm CMOS. - Andrea Mazzanti; Enrico Monaco; Massimo Pozzoni; Francesco Svelto (ISSCC, 2010)

Injection-Locked CMOS Frequency Doublers for μ -Wave and mm-Wave Applications. - Enrico Monaco; Massimo Pozzoni; Francesco Svelto; Andrea Mazzanti (IEEE J. Solid State Circuits, 2010)

A mm-Wave quadrature VCO based on magnetically coupled resonators. - Ugo Decanis; Andrea Ghilioni; Enrico Monaco; Andrea Mazzanti; Francesco Svelto (ISSCC, 2011)

A 6.5mW inductorless CMOS frequency divider-by-4 operating up to 70GHz. - Andrea Ghilioni; Ugo Decanis; Enrico Monaco; Andrea Mazzanti; Francesco Svelto (ISSCC, 2011)

A Low-Noise Quadrature VCO Based on Magnetically Coupled Resonators and a Wideband Frequency Divider at Millimeter Waves. - Ugo Decanis; Andrea Ghilioni; Enrico Monaco; Andrea Mazzanti; Francesco Svelto (IEEE J. Solid State Circuits, 2011)

A 33.6-to-46.2GHz 32nm CMOS VCO with 177.5dBc/Hz minimum noise FOM using inductor splitting for tuning extension. - Enrico Mammei; Enrico Monaco; Andrea Mazzanti; Francesco Svelto (ISSCC, 2013)

A 0.2-11.7GHz, high accuracy injection-locking multi-phase generation with mixed analog/digital calibration loops in 28nm FDSOI CMOS. - Gabriele Anzalone; Enrico Monaco; Guido Albasini; Simone Erba; Andrea Mazzanti (ESSCIRC, 2016)

6.4 A 64Gb/s PAM-4 transmitter with 4-Tap FFE and 2.26pJ/b energy efficiency in 28nm CMOS FDSOI. - Giovanni Steffan; Emanuele Depaoli; Enrico Monaco; Nicolo Sabatino; Walter Audoglio; Augusto Andrea Rossi; Simone Erba; Matteo Bassi; Andrea Mazzanti (ISSCC, 2017)

A 2-11 GHz 7-Bit High-Linearity Phase Rotator Based on Wideband Injection-Locking Multi-Phase Generation for High-Speed Serial Links in 28-nm CMOS FDSOI. - Enrico Monaco; Gabriele Anzalone; Guido Albasini; Simone Erba; Matteo Bassi; Andrea Mazzanti (IEEE J. Solid State Circuits, 2017)

Flexible Transversal Continuous-Time Linear Equalizer Operating up to 25Gb/s in 28nm CMOS. - H. Zhang; Enrico Monaco; Matteo Bassi; Andrea Mazzanti (ISCAS, 2018)

A 4.9pJ/b 16-to-64Gb/s PAM-4 VSR transceiver in 28nm FDSOI CMOS. - Emanuele Depaoli; Enrico Monaco; Giovanni Steffan; Marco Mazzini; Hongyang Zhang; Walter Audoglio; Oscar Belotti; Augusto Andrea Rossi; Guido Albasini; Massimo Pozzoni; Simone Erba; Andrea Mazzanti (ISSCC, 2018)

Delay-lines jitter modeling and efficiency analysis in FinFET technology. - Alessio Di Pasquo; Enrico Monaco; Claudio Nani; Luca Fanucci (ICECS, 2021)

A High Linearity Driver with Embedded Interleaved Track-and-Hold Array for High-Speed ADC. - Alessio Di Pasquo; Claudio Nani; Enrico Monaco; Luca Fanucci (ISCAS, 2021)

A 112 Gb/s PAM-4 RX Front-End With Unclocked Decision Feedback Equalizer. - Ibrahim Petricli; Hongyang Zhang; Enrico Monaco; Guido Albasini; Andrea Mazzanti (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

A 0.94 V Dynamic Bias Double Tail Comparator for High-Speed Applications in 5 nm Technology. - Valentina Marazzi; Enrico Monaco; Claudio Nani; Danilo Manstretta (ApplePies, 2023)

Analysis and Design of a Low Power Double Tail Comparator with Dynamic Bias in 5nm FinFET Technology. - Valentina Marazzi; Enrico Monaco; Claudio Nani; Danilo Manstretta (PRIME, 2023)

A 800Gb/s Transceiver for PAM-4 Optical Direct-Detection Applications in 5nm FinFet Process. - Fabio Giunco; Marco Sosio; Claudio Nani; Ivan Fabiano; Travis Lovitt; Victor Karam; D. Albano; C. Asero; Nicola Codega; Marco Garampazzi; Nicola Ghittori; D. Herbas; et al. (VLSI Technology and Circuits, 2024)

A 5nm 60GS/s 7b 64-Way Time Interleaved Partial Loop Unrolled SAR ADC Achieving 34dB SNDR up to 32GHz. - Claudio Nani; Enrico Monaco; Nicola Ghittori; Alessandro Bosi; Domenico Albano; Claudio Asero; Nicola Codega; Alessio Di Pasquo; Ivan Fabiano; Marco Garampazzi; Fabio Giunco; Leonardo Daniel Herbas Burgos; et al. (VLSI Technology and Circuits, 2024)

An Eight-Lane 800-Gb/s Transceiver for PAM-4 Optical Direct-Detection Applications in 5-nm FinFET Process. - Fabio Giunco; Marco Sosio; Claudio Nani; Ivan Fabiano; Travis Lovitt; Victor Karam; Domenico Albano; Claudio Asero; Nicola Codega; Marco Garampazzi; Nicola Ghittori; Leonardo Daniel Herbas Burgos; et al. (IEEE J. Solid State Circuits, 2025)

A 5-nm 60-GS/s 7b 64-Way Time Interleaved Partial Loop Unrolled SAR ADC Achieving 35.2dB SNDR up to 32 GHz. - Claudio Nani; Enrico Monaco; Nicola Ghittori; Alessandro Bosi; Domenico Albano; Claudio Asero; Nicola Codega; Alessio Di Pasquo; Ivan Fabiano; Marco Garampazzi; Fabio Giunco; Leonardo Daniel Herbas Burgos; et al. (IEEE J. Solid State Circuits, 2025)