Enrique Alvarez

Orcid: 0000-0002-2446-0445

Affiliations:
  • University of California at San Diego, La Jolla, CA, USA
  • Pontifical Catholic University of Chile, Department of Electrical Engineering, Chile


According to our database1, Enrique Alvarez authored at least 11 papers between 2013 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2021
Delta-Sigma FDC Enhancements for FDC-Based Digital Fractional-N PLLs.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

A Time Amplifier Assisted Frequency-to-Digital Converter Based Digital Fractional-N PLL.
IEEE J. Solid State Circuits, 2021

Spectral Breathing and Its Mitigation in Digital Fractional-N PLLs.
IEEE J. Solid State Circuits, 2021

2019
A Non-Linearity Compensation Technique for Charge-Redistribution SAR ADCs.
Proceedings of the IEEE Latin American Test Symposium, 2019

2018
Multi-Rate DEM With Mismatch-Noise Cancellation for DCOs in Digital PLLs.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

High-Density Redox Amplified Coulostatic Discharge-Based Biosensor Array.
IEEE J. Solid State Circuits, 2018

2017
A 64×64 high-density redox amplified coulostatic discharge-based biosensor array in 180nm CMOS.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017

2016
Canonical Syllogistic Moods in Traditional Aristotelian Logic.
Logica Universalis, 2016

2015
Passive reference-sharing SAR ADC.
Microelectron. J., 2015

2014
Digital assistance for energy reduction in ADCs using a simple signal prediction algorithm.
Proceedings of the IEEE 5th Latin American Symposium on Circuits and Systems, 2014

2013
Fully-differential offset-cancelling circuit with configurable output common-mode voltage.
Proceedings of the 4th IEEE Latin American Symposium on Circuits and Systems, 2013


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