FPGA Implementation of the Ridge Line Following Fingerprint Algorithm. - Enrique Cantó; Nicolau Canyellas; Mariano Fons; Francisco Fons; Mariano López (FPL, 2004)

Hardware-Software Codesign of a Fingerprint Identification Algorithm. - Nicolau Canyellas; Enrique Cantó; Giuseppe Forte; Mariano López (AVBPA, 2005)

Trigonometric Computing Embedded in a Dynamically Reconfigurable CORDIC System-on-Chip. - Francisco Fons; Mariano Fons; Enrique Cantó; Mariano López (ARC, 2006)

Dynamically Reconfigurable CORDIC Coprocessor for Trigonometric. - Francisco Fons; Mariano Fons; Enrique Cantó; Mariano López (ARCS Workshops, 2006)

FPGA Implementation of a Ridge Extraction Fingerprint Algorithm Based on Microblaze and Hardware Coprocessor. - Mariano López-García; Enrique F. Cantó-Navarro (FPL, 2006)

Custom-Made Design of a Digital PID Control System. - Francisco Fons; Mariano Fons; Enrique Cantó (ICASSP (3), 2006)

Hardware-Software Co-design of a Dynamically Reconfigurable FPGA-based Fuzzy Logic Controller. - Francisco Fons; Mariano Fons; Enrique Cantó (ICECS, 2006)

System-on-Chip Design of a Fuzzy Logic Controller Based on Dynamically Reconfigurable Hardware. - Francisco Fons; Mariano Fons; Enrique Cantó (Int. Trans. Syst. Sci. Appl., 2006)

Design of a hardware accelerator for fingerprint alignment. - Mariano Fons; Francisco Fons; Enrique Cantó; Mariano López (FPL, 2007)

Self-recofigurable embedded systems on Spartan-3. - Enrique Cantó; Francesc Fons; Mariano López (FPL, 2008)

Acceleration of complex algorithms on a fast reconfigurable embedded system on Spartan-3. - Enrique Cantó; Mariano Fons; Mariano López-García; Rafael Ramos-Lara (FPL, 2009)

Clock duplicity for high-precision timestamping in Gigabit Ethernet. - Carles Nicolau; Dolors Sala; Enrique Cantó (FPL, 2009)

SVM speaker verification system based on a low-cost FPGA. - Rafael Ramos-Lara; Mariano López-García; Enrique F. Cantó-Navarro; Luis Puente-Rodriguez (FPL, 2009)

Fingerprint Image Processing Acceleration Through Run-Time Reconfigurable Hardware. - Mariano Fons; Francisco Fons; Enrique Cantó (IEEE Trans. Circuits Syst. II Express Briefs, 2010)

Hardware-software co-design of an iris recognition algorithm. - Mariano López; John Daugman; Enrique Cantó (IET Inf. Secur., 2011)

Run-time self-reconfigurable 2D convolver for adaptive image processing. - Francisco Fons; Mariano Fons; Enrique Cantó (Microelectron. J., 2011)

Biometrics-based consumer applications driven by reconfigurable hardware architectures. - Mariano Fons; Francesc Fons; Enrique Cantó (Future Gener. Comput. Syst., 2012)

FPGA-based Personal Authentication Using Fingerprints. - Mariano Fons; Francisco Fons; Enrique Cantó; Mariano López (J. Signal Process. Syst., 2012)

Deployment of Run-Time Reconfigurable Hardware Coprocessors Into Compute-Intensive Embedded Applications. - Francisco Fons; Mariano Fons; Enrique Cantó; Mariano López (J. Signal Process. Syst., 2012)

Guide to FPGA Implementation of Arithmetic Functions - Jean-Pierre Deschamps; Gustavo Sutter; Enrique Cantó (Springer, 2012)

Real-time embedded systems powered by FPGA dynamic partial self-reconfiguration: a case study oriented to biometric recognition applications. - Francisco Fons; Mariano Fons; Enrique Cantó; Mariano López (J. Real Time Image Process., 2013)

Fast Self-Reconfigurable Embedded System on Spartan-3. - Enrique Cantó; Mariano Fons; Francesc Fons; Mariano López; Rafael Ramos-Lara (J. Univers. Comput. Sci., 2013)

Real-Time Speaker Verification System Implemented on Reconfigurable Hardware. - Rafael Ramos-Lara; Mariano López-García; Enrique F. Cantó-Navarro; Luis Puente-Rodriguez (J. Signal Process. Syst., 2013)

Implementation on MicroBlaze of AES algorithm to reveal fake keys against side-channel attacks. - Ruben Lumbiarres-Lopez; Mariano López-García; Enrique F. Cantó-Navarro (ISIE, 2014)

Embedded System for Biometric Online Signature Verification. - Mariano López-García; Rafael Ramos-Lara; Oscar Miguel-Hurtado; Enrique F. Cantó-Navarro (IEEE Trans. Ind. Informatics, 2014)

Flexible Biometric Online Speaker-Verification System Implemented on FPGA Using Vector Floating-Point Units. - Enrique F. Cantó-Navarro; Mariano López-García; Rafael Ramos-Lara; Raul Sánchez-Reillo (IEEE Trans. Very Large Scale Integr. Syst., 2015)

A new countermeasure against side-channel attacks based on hardware-software co-design. - Ruben Lumbiarres-Lopez; Mariano López-García; Enrique F. Cantó-Navarro (Microprocess. Microsystems, 2016)

Floating-point accelerator for biometric recognition on FPGA embedded systems. - Enrique F. Cantó-Navarro; Mariano López-García; Rafael Ramos-Lara (J. Parallel Distributed Comput., 2018)

Hardware Architecture Implemented on FPGA for Protecting Cryptographic Keys against Side-Channel Attacks. - Ruben Lumbiarres-Lopez; Mariano López-García; Enrique F. Cantó-Navarro (IEEE Trans. Dependable Secur. Comput., 2018)

AXI Hardware Accelerator for McEliece on FPGA Embedded Systems. - Enrique F. Cantó-Navarro; Mariano López-García (IEEE Trans. Dependable Secur. Comput., 2025)

Converting Fixed-Length Binary Strings Into Constant Weight Words: Application on Post-Quantum Cryptography. - Mariano López-García; David G. Farouk-Marei; Enrique F. Cantó-Navarro (IEEE Trans. Dependable Secur. Comput., 2025)