Ultra-low power render-based collision detection for CPU/GPU systems. - Enrique de Lucas; Pedro Marcuello; Joan-Manuel Parcerisa; Antonio González 001 (MICRO, 2015)

DSPONE48: A methodology for automatically synthesize HDL focus on the reuse of DSP slices. - Enrique de Lucas; Marcos Sánchez-Élez; Inmaculada Pardines (J. Parallel Distributed Comput., 2017)

Reducing redundancy of real time computer graphics in mobile systems. - Enrique de Lucas (2018)

Early Visibility Resolution for Removing Ineffectual Computations in the Graphics Pipeline. - Martí Anglada; Enrique de Lucas; Joan-Manuel Parcerisa; Juan L. Aragón; Antonio González 001 (HPCA, 2019)

Rendering Elimination: Early Discard of Redundant Tiles in the Graphics Pipeline. - Martí Anglada; Enrique de Lucas; Joan-Manuel Parcerisa; Juan L. Aragón; Pedro Marcuello; Antonio González 001 (HPCA, 2019)

Visibility Rendering Order: Improving Energy Efficiency on Mobile GPUs through Frame Coherence. - Enrique de Lucas; Pedro Marcuello; Joan-Manuel Parcerisa; Antonio González 001 (IEEE Trans. Parallel Distributed Syst., 2019)

Dynamic sampling rate: harnessing frame coherence in graphics applications for energy-efficient GPUs. - Martí Anglada; Enrique de Lucas; Joan-Manuel Parcerisa; Juan L. Aragón; Antonio González 001 (J. Supercomput., 2022)

Omega-Test: A Predictive Early-Z Culling to Improve the Graphics Pipeline Energy-Efficiency. - David Corbalán-Navarro; Juan L. Aragón; Martí Anglada; Enrique de Lucas; Joan-Manuel Parcerisa; Antonio González 001 (IEEE Trans. Vis. Comput. Graph., 2022)