MOS current gain cells with electronically variable gain and constant bandwidth. - Eric A. M. Klumperink; Evert Seevinck (IEEE J. Solid State Circuits, 1989)

A CMOS OTA for HF filters with programmable transfer function. - Eric J. van der Zwan; Eric A. M. Klumperink; Evert Seevinck (IEEE J. Solid State Circuits, 1991)

AM suppression with low AM-PM conversion with the aid of a variable-gain amplifier. - Eric A. M. Klumperink; Carlo T. Klein; Bas Rüggeberg; Ed J. M. van Tuijl (IEEE J. Solid State Circuits, 1996)

Intrinsic 1/f device noise reduction and its effect on phase noise in CMOS ring oscillators. - Sander L. J. Gierkink; Eric A. M. Klumperink; Arnoud P. van der Wel; Gian Hoogzaad; Ed A. J. M. van Tuijl; Bram Nauta (IEEE J. Solid State Circuits, 1999)

Reducing MOSFET 1/f noise and power consumption by switched biasing. - Eric A. M. Klumperink; Sander L. J. Gierkink; Arnoud P. van der Wel; Bram Nauta (IEEE J. Solid State Circuits, 2000)

Finding all elementary circuits exploiting transconductance. - Eric A. M. Klumperink; Federico Bruccoleri; Bram Nauta (ISCAS (1), 2001)

Generating all two-MOS-transistor amplifiers leads to new wide-band LNAs. - Federico Bruccoleri; Eric A. M. Klumperink; Bram Nauta (IEEE J. Solid State Circuits, 2001)

Systematic comparison of HF CMOS transconductors. - Eric A. M. Klumperink; Bram Nauta (IEEE Trans. Circuits Syst. II Express Briefs, 2003)

A wideband high-linearity RF receiver front-end in CMOS. - Vincent J. Arkesteijn; Eric A. M. Klumperink; Bram Nauta (ESSCIRC, 2004)

Distortion cancellation via polyphase multipath circuits. - Eisse Mensink; Eric A. M. Klumperink; Bram Nauta (ISCAS (1), 2004)

A 2.5-10-GHz clock multiplier unit with 0.22-ps RMS jitter in standard 0.18-μm CMOS. - Remco C. H. van de Beek; Cicero S. Vaucher; Domine M. W. Leenaerts; Eric A. M. Klumperink; Bram Nauta (IEEE J. Solid State Circuits, 2004)

Wide-band CMOS low-noise amplifier exploiting thermal noise canceling. - Federico Bruccoleri; Eric A. M. Klumperink; Bram Nauta (IEEE J. Solid State Circuits, 2004)

A CMOS switched transconductor mixer. - Eric A. M. Klumperink; Simon M. Louwsma; Gerard J. M. Wienk; Bram Nauta (IEEE J. Solid State Circuits, 2004)

Optimally-placed twists in global on-chip differential interconnects. - Eisse Mensink; Daniël Schinkel; Eric A. M. Klumperink; Ed van Tuijl; Bram Nauta (ESSCIRC, 2005)

Jitter limitations on multi-carrier modulation. - Jan H. Rutger Schrader; Eric A. M. Klumperink; Jan L. Visschers; Bram Nauta (ISCAS (6), 2005)

Distortion cancellation by polyphase multipath circuits. - Eisse Mensink; Eric A. M. Klumperink; Bram Nauta (IEEE Trans. Circuits Syst. I Regul. Pap., 2005)

Wireline Equalization using Pulse-Width Modulation. - Jan H. Rutger Schrader; Eric A. M. Klumperink; Jan L. Visschers; Bram Nauta (CICC, 2006)

Slew rate induced distortion in switched-resistor integrators. - Amorn Jiraseree-amornkun; Apisak Worapishet; Eric A. M. Klumperink; Bram Nauta; Wanlop Surakampontorn (ISCAS, 2006)

A multipath technique for canceling harmonics and sidebands in a wideband power upconverter. - Rameswor Shrestha; Eisse Mensink; Eric A. M. Klumperink; Gerard J. M. Wienk; Bram Nauta (ISSCC, 2006)

A 3-Gb/s/ch transceiver for 10-mm uninterrupted RC-limited global on-chip interconnects. - Daniël Schinkel; Eisse Mensink; Eric A. M. Klumperink; Ed J. M. van Tuijl; Bram Nauta (IEEE J. Solid State Circuits, 2006)

Pulse-width modulation pre-emphasis applied in a wireline transmitter, achieving 33 dB loss compensation at 5-Gb/s in 0.13-μm CMOS. - Jan H. Rutger Schrader; Eric A. M. Klumperink; Jan L. Visschers; Bram Nauta (IEEE J. Solid State Circuits, 2006)

A Polyphase Multipath Technique for Software-Defined Radio Transmitters. - Rameswor Shrestha; Eric A. M. Klumperink; Eisse Mensink; Gerard J. M. Wienk; Bram Nauta (IEEE J. Solid State Circuits, 2006)

Jitter requirements of the sampling clock in software radio receivers. - Vincent J. Arkesteijn; Eric A. M. Klumperink; Bram Nauta (IEEE Trans. Circuits Syst. II Express Briefs, 2006)

An inductorless wideband balun-LNA in 65nm CMOS with balanced output. - Stephan C. Blaakmeer; Eric A. M. Klumperink; Bram Nauta; Domine M. W. Leenaerts (ESSCIRC, 2007)

Low-Jitter Multi-phase Clock Generation: A Comparison between DLLs and Shift Registers. - Xiang Gao 002; Eric A. M. Klumperink; Bram Nauta (ISCAS, 2007)

Multipath Polyphase Circuits and their Application to RF Transceivers. - Eric A. M. Klumperink; Rameswor Shrestha; Eisse Mensink; Gerard Wienk; Zhiyu Ru; Bram Nauta (ISCAS, 2007)

On the Suitability of Discrete-Time Receivers for Software-Defined Radio. - Zhiyu Ru; Eric A. M. Klumperink; Bram Nauta (ISCAS, 2007)

A 0.28pJ/b 2Gb/s/ch Transceiver in 90nm CMOS for 10mm On-Chip interconnects. - Eisse Mensink; Daniël Schinkel; Eric A. M. Klumperink; Ed van Tuijl; Bram Nauta (ISSCC, 2007)

A Double-Tail Latch-Type Voltage Sense Amplifier with 18ps Setup+Hold Time. - Daniël Schinkel; Eisse Mensink; Eric A. M. Klumperink; Ed van Tuijl; Bram Nauta (ISSCC, 2007)

Cognitive radios for dynamic spectrum access - polyphase multipath radio circuits for dynamic spectrum access. - Eric A. M. Klumperink; Rameswor Shrestha; Eisse Mensink; Vincent J. Arkesteijn; Bram Nauta (IEEE Commun. Mag., 2007)

Low-Frequency Noise Phenomena in Switched MOSFETs. - Arnoud P. van der Wel; Eric A. M. Klumperink; Jay S. Kolhatkar; Eric Hoekstra; Martijn F. Snoeij; Cora Salm; Hans Wallinga; Bram Nauta (IEEE J. Solid State Circuits, 2007)

Optimal Positions of Twists in Global On-Chip Differential Interconnects. - Eisse Mensink; Daniël Schinkel; Eric A. M. Klumperink; Ed van Tuijl; Bram Nauta (IEEE Trans. Very Large Scale Integr. Syst., 2007)

A Wideband Balun LNA I/Q-Mixer combination in 65nm CMOS. - Stephan C. Blaakmeer; Eric A. M. Klumperink; Domine Leenaerts; Bram Nauta (ISSCC, 2008)

A 1.9μW 4.4fJ/Conversion-step 10b 1MS/s Charge-Redistribution ADC. - Michiel van Elzakker; Ed van Tuijl; Paul F. J. Geraedts; Daniël Schinkel; Eric A. M. Klumperink; Bram Nauta (ISSCC, 2008)

A 90μW 12MHz Relaxation Oscillator with a -162dB FOM. - Paul F. J. Geraedts; Ed van Tuijl; Eric A. M. Klumperink; Gerard Wienk; Bram Nauta (ISSCC, 2008)

A Discrete-Time Mixing Receiver Architecture with Wideband Harmonic Rejection. - Zhiyu Ru; Eric A. M. Klumperink; Bram Nauta (ISSCC, 2008)

Wideband Balun-LNA With Simultaneous Output Balancing, Noise-Canceling and Distortion-Canceling. - Stephan C. Blaakmeer; Eric A. M. Klumperink; Domine M. W. Leenaerts; Bram Nauta (IEEE J. Solid State Circuits, 2008)

The Blixer, a Wideband Balun-LNA-I/Q-Mixer Topology. - Stephan C. Blaakmeer; Eric A. M. Klumperink; Domine M. W. Leenaerts; Bram Nauta (IEEE J. Solid State Circuits, 2008)

Advantages of Shift Registers Over DLLs for Flexible Low Jitter Multiphase Clock Generation. - Xiang Gao 002; Bram Nauta; Eric A. M. Klumperink (IEEE Trans. Circuits Syst. II Express Briefs, 2008)

Theoretical Analysis of Highly Linear Tunable Filters Using Switched-Resistor Techniques. - Amorn Jiraseree-amornkun; Apisak Worapishet; Eric A. M. Klumperink; Bram Nauta; Wanlop Surakampontorn (IEEE Trans. Circuits Syst. I Regul. Pap., 2008)

A Two-Stage Approach to Harmonic Rejection Mixing Using Blind Interference Cancellation. - Niels A. Moseley; Eric A. M. Klumperink; Bram Nauta (IEEE Trans. Circuits Syst. II Express Briefs, 2008)

A 2.2GHz 7.6mW sub-sampling PLL with -126dBc/Hz in-band phase noise and 0.15psrms jitter in 0.18µm CMOS. - Xiang Gao 002; Eric A. M. Klumperink; Mounir Bohsali; Bram Nauta (ISSCC, 2009)

A 400-to-900 MHz receiver with dual-domain harmonic rejection exploiting adaptive interference cancellation. - Niels A. Moseley; Zhiyu Ru; Eric A. M. Klumperink; Bram Nauta (ISSCC, 2009)

A software-defined radio receiver architecture robust to out-of-band interference. - Zhiyu Ru; Eric A. M. Klumperink; Gerard Wienk; Bram Nauta (ISSCC, 2009)

A 0.2-to-2.0GHz 65nm CMOS receiver without LNA achieving ≫11dBm IIP3 and ≪6.5 dB NF. - Michiel C. M. Soer; Eric A. M. Klumperink; Zhiyu Ru; Frank E. van Vliet; Bram Nauta (ISSCC, 2009)

A Low Noise Sub-Sampling PLL in Which Divider Noise is Eliminated and PD/CP Noise is Not Multiplied by N2. - Xiang Gao 002; Eric A. M. Klumperink; Mounir Bohsali; Bram Nauta (IEEE J. Solid State Circuits, 2009)

Digitally Enhanced Software-Defined Radio Receiver Robust to Out-of-Band Interference. - Zhiyu Ru; Niels A. Moseley; Eric A. M. Klumperink; Bram Nauta (IEEE J. Solid State Circuits, 2009)

Spurious-Free Dynamic Range of a Uniform Quantizer. - Mark S. Oude Alink; André B. J. Kokkeler; Eric A. M. Klumperink; Kenneth C. Rovers; Gerard J. M. Smit; Bram Nauta (IEEE Trans. Circuits Syst. II Express Briefs, 2009)

Jitter Analysis and a Benchmarking Figure-of-Merit for Phase-Locked Loops. - Xiang Gao 002; Eric A. M. Klumperink; Paul F. J. Geraedts; Bram Nauta (IEEE Trans. Circuits Syst. II Express Briefs, 2009)

Low-Power, High-Speed Transceivers for Network-on-Chip Communication. - Daniël Schinkel; Eisse Mensink; Eric A. M. Klumperink; Ed van Tuijl; Bram Nauta (IEEE Trans. Very Large Scale Integr. Syst., 2009)

Time delay circuits: A quality criterion for delay variations versus frequency. - Seyed Kasra Garakoui; Eric A. M. Klumperink; Bram Nauta; Frank E. van Vliet (ISCAS, 2010)

Spur-reduction techniques for PLLs using sub-sampling phase detection. - Xiang Gao 002; Eric A. M. Klumperink; Gerard Socci; Mounir Bohsali; Bram Nauta (ISSCC, 2010)

Optimized Stage Ratio of Tapered CMOS Inverters for Minimum Power and Mismatch Jitter Product. - Ramen Dutta; Tarun Kanti Bhattacharyya; Xiang Gao 002; Eric A. M. Klumperink (VLSI Design, 2010)

A 10-bit Charge-Redistribution ADC Consuming 1.9 μ W at 1 MS/s. - Michiel van Elzakker; Ed van Tuijl; Paul F. J. Geraedts; Daniël Schinkel; Eric A. M. Klumperink; Bram Nauta (IEEE J. Solid State Circuits, 2010)

Spur Reduction Techniques for Phase-Locked Loops Exploiting A Sub-Sampling Phase Detector. - Xiang Gao 002; Eric A. M. Klumperink; Gerard Socci; Mounir Bohsali; Bram Nauta (IEEE J. Solid State Circuits, 2010)

Power Efficient Gigabit Communication Over Capacitively Driven RC-Limited On-Chip Interconnects. - Eisse Mensink; Daniël Schinkel; Eric A. M. Klumperink; Ed van Tuijl; Bram Nauta (IEEE J. Solid State Circuits, 2010)

Discrete-Time Mixing Receiver Architecture for RF-Sampling Software-Defined Radio. - Zhiyu Ru; Eric A. M. Klumperink; Bram Nauta (IEEE J. Solid State Circuits, 2010)

A 300-800 MHz Tunable Filter and Linearized LNA Applied in a Low-Noise Harmonic-Rejection RF-Sampling Receiver. - Zhiyu Ru; Eric A. M. Klumperink; Carlos E. Saavedra; Bram Nauta (IEEE J. Solid State Circuits, 2010)

Unified Frequency-Domain Analysis of Switched-Series- RC Passive Mixers and Samplers. - Michiel C. M. Soer; Eric A. M. Klumperink; Pieter-Tjerk de Boer; Frank E. van Vliet; Bram Nauta (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

Jitter-Power minimization of digital frequency synthesis architectures. - Eric A. M. Klumperink; Ramen Dutta; Zhiyu Ru; Bram Nauta; Xiang Gao 002 (ISCAS, 2011)

Towards suppression of all harmonics in a polyphase multipath transmitter. - Saqib Subhan; Eric A. M. Klumperink; Bram Nauta (ISCAS, 2011)

A 1.0-to-4.0GHz 65nm CMOS four-element beamforming receiver using a switched-capacitor vector modulator with approximate sine weighting via charge redistribution. - Michiel C. M. Soer; Eric A. M. Klumperink; Bram Nauta; Frank E. van Vliet (ISSCC, 2011)

Exploring the Use of Two Antennas for Crosscorrelation Spectrum Sensing. - Mark S. Oude Alink; A. R. Smeenge; André B. J. Kokkeler; Eric A. M. Klumperink; Gerard J. M. Smit; Bram Nauta (VTC Fall, 2011)

Tunable High-Q N-Path Band-Pass Filters: Modeling and Verification. - Amir Ghaffari; Eric A. M. Klumperink; Michiel C. M. Soer; Bram Nauta (IEEE J. Solid State Circuits, 2011)

Spatial Interferer Rejection in a Four-Element Beamforming Receiver Front-End With a Switched-Capacitor Vector Modulator. - Michiel C. M. Soer; Eric A. M. Klumperink; Bram Nauta; Frank E. van Vliet (IEEE J. Solid State Circuits, 2011)

Lowering the SNR Wall for Energy Detection Using Cross-Correlation. - Mark S. Oude Alink; André B. J. Kokkeler; Eric A. M. Klumperink; Gerard J. M. Smit; Bram Nauta (IEEE Trans. Veh. Technol., 2011)

Improving harmonic rejection for spectrum sensing using crosscorrelation. - Mark S. Oude Alink; André B. J. Kokkeler; Eric A. M. Klumperink; Zhiyu Ru; Wei Cheng; Bram Nauta (ESSCIRC, 2012)

A 0.3-to-1.2GHz tunable 4th-order switched gm-C bandpass filter with >55dB ultimate rejection and out-of-band IIP3 of +29dBm. - Milad Darvishi; Ronan A. R. van der Zee; Eric A. M. Klumperink; Bram Nauta (ISSCC, 2012)

A 1-to-2.5GHz phased-array IC based on gm-RC all-pass time-delay cells. - Seyed Kasra Garakoui; Eric A. M. Klumperink; Bram Nauta; Frank E. van Vliet (ISSCC, 2012)

8-Path tunable RF notch filters for blocker suppression. - Amir Ghaffari; Eric A. M. Klumperink; Bram Nauta (ISSCC, 2012)

Beamforming techniques and RF transceiver design. - Eric A. M. Klumperink; Domine Leenaerts; Gabriel M. Rebeiz (ISSCC, 2012)

A 1.5-to-5.0GHz input-matched +2dBm P1dB all-passive switched-capacitor beamforming receiver front-end in 65nm CMOS. - Michiel C. M. Soer; Eric A. M. Klumperink; Bram Nauta; Frank E. van Vliet (ISSCC, 2012)

Widely Tunable 4th Order Switched Gm-C Band-Pass Filter Based on N-Path Filters. - Milad Darvishi; Ronan A. R. van der Zee; Eric A. M. Klumperink; Bram Nauta (IEEE J. Solid State Circuits, 2012)

A CMOS-Compatible Spectrum Analyzer for Cognitive Radio Exploiting Crosscorrelation to Improve Linearity and Noise Performance. - Mark S. Oude Alink; Eric A. M. Klumperink; André B. J. Kokkeler; Michiel C. M. Soer; Gerard J. M. Smit; Bram Nauta (IEEE Trans. Circuits Syst. I Regul. Pap., 2012)

Simultaneous spatial and frequency-domain filtering at the antenna inputs achieving up to +10dBm out-of-band/beam P1dB. - Amir Ghaffari; Eric A. M. Klumperink; Frank E. van Vliet; Bram Nauta (ISSCC, 2013)

F1: Advanced RF transceiver design techniques. - Albert C. Jerng; Yorgos Palaskas; Eric A. M. Klumperink; Didier Belot; Songcheol Hong; Brian A. Floyd (ISSCC, 2013)

Spectrum Sensing With High Sensitivity and Interferer Robustness Using Cross-Correlation Energy Detection. - Mark S. Oude Alink; André B. J. Kokkeler; Eric A. M. Klumperink; Gerard J. M. Smit; Bram Nauta (IEEE J. Emerg. Sel. Topics Circuits Syst., 2013)

Tunable N-Path Notch Filters for Blocker Suppression: Modeling and Verification. - Amir Ghaffari; Eric A. M. Klumperink; Bram Nauta (IEEE J. Solid State Circuits, 2013)

Flip-Flops for Accurate Multiphase Clocking: Transmission Gate Versus Current Mode Logic. - Ramen Dutta; Eric A. M. Klumperink; Xiang Gao 002; Zhiyu Ru; Ronan A. R. van der Zee; Bram Nauta (IEEE Trans. Circuits Syst. II Express Briefs, 2013)

Frequency Limitations of First-Order gm - RC All-Pass Delay Circuits. - Seyed Kasra Garakoui; Eric A. M. Klumperink; Bram Nauta; Frank E. van Vliet (IEEE Trans. Circuits Syst. II Express Briefs, 2013)

RF transconductor linearization technique robust to process, voltage and temperature variations. - Harish Kundur Subramaniyan; Eric A. M. Klumperink; Bram Nauta; Venkatesh Srinivasan; Ali Kiaei (A-SSCC, 2014)

RF self-interference cancellation for full-duplex. - Barend van Liempd; Björn Debaillie; Jan Craninckx; Cristina Lavin; Carmen Palacios; Satoshi Malotaux; John R. Long; D. J. van den Broek; Eric A. M. Klumperink (CrownCom, 2014)

A 500MHz- 2.7 GHz 8-path weaver downconverter with harmonic rejection and embedded filtering. - Remko E. Struiksma; Eric A. M. Klumperink; Bram Nauta; Frank E. van Vliet (ESSCIRC, 2014)

3.5 A 1.0-to-2.5GHz beamforming receiver with constant-Gm vector modulator consuming. - Michiel C. M. Soer; Eric A. M. Klumperink; Bram Nauta; Frank E. van Vliet (ISSCC, 2014)

Software defined radio receivers exploiting noise cancelling: A tutorial review. - Eric A. M. Klumperink; Bram Nauta (IEEE Commun. Mag., 2014)

An Ultra Low Energy FSK Receiver With In-Band Interference Robustness Exploiting a Three-Phase Chirped LO. - Ramen Dutta; Ronan A. R. van der Zee; André B. J. Kokkeler; Mark J. Bentum; Eric A. M. Klumperink; Bram Nauta (IEEE J. Emerg. Sel. Topics Circuits Syst., 2014)

Towards minimum achievable phase noise of relaxation oscillators. - Paul F. J. Geraedts; Ed J. M. van Tuijl; Eric A. M. Klumperink; Gerard J. M. Wienk; Bram Nauta (Int. J. Circuit Theory Appl., 2014)

Analog/RF Solutions Enabling Compact Full-Duplex Radios. - Björn Debaillie; Dirk-Jan van den Broek; Cristina Lavin; Barend van Liempd; Eric A. M. Klumperink; Carmen Palacios; Jan Craninckx; Bram Nauta; Aarno Pärssinen (IEEE J. Sel. Areas Commun., 2014)

A 4-Element Phased-Array System With Simultaneous Spatial- and Frequency-Domain Filtering at the Antenna Inputs. - Amir Ghaffari; Eric A. M. Klumperink; Frank E. van Vliet; Bram Nauta (IEEE J. Solid State Circuits, 2014)

Cancellation of OpAmp Virtual Ground Imperfections by a Negative Conductance Applied to Improve RF Receiver Linearity. - Dlovan H. Mahrof; Eric A. M. Klumperink; Zhiyu Ru; Mark S. Oude Alink; Bram Nauta (IEEE J. Solid State Circuits, 2014)

Comments on "Cancellation of OpAmp Virtual Ground Imperfections by a Negative Conductance Applied to Improve RF Receiver Linearity". - P. V. Ananda Mohan; Eric A. M. Klumperink; Dlovan H. Mahrof; Bram Nauta (IEEE J. Solid State Circuits, 2014)

A 100-800 MHz 8-Path Polyphase Transmitter With Mixer Duty-Cycle Control Achieving <-40 dBc for ALL Harmonics. - Saqib Subhan; Eric A. M. Klumperink; Amir Ghaffari; Gerard J. M. Wienk; Bram Nauta (IEEE J. Solid State Circuits, 2014)

Sub-sampling PLL techniques. - Xiang Gao 002; Eric A. M. Klumperink; Bram Nauta (CICC, 2015)

In-band full-duplex transceiver technology for 5G mobile networks. - Björn Debaillie; Barend van Liempd; Benjamin P. Hershberg; Jan Craninckx; Kari Rikkinen; D. J. van den Broek; Eric A. M. Klumperink; Bram Nauta (ESSCIRC, 2015)

19.2 A self-interference-cancelling receiver for in-band full-duplex wireless with low distortion under cancellation of strong TX leakage. - Dirk-Jan van den Broek; Eric A. M. Klumperink; Bram Nauta (ISSCC, 2015)

ES3: How to achieve 1000× more wireless data capacity? 5G? - Eric A. M. Klumperink; Sven Mattisson; Vojkan Vidojkovic (ISSCC, 2015)

5.5 A forward-body-bias tuned 450MHz Gm-C 3rd-order low-pass filter in 28nm UTBB FD-SOI with >1dBVp IIP3 over a 0.7-to-1V supply. - Joeri Lechevallier; Remko E. Struiksma; Hani Sherry; Andreia Cathelin; Eric A. M. Klumperink; Bram Nauta (ISSCC, 2015)

An In-Band Full-Duplex Radio Receiver With a Passive Vector Modulator Downmixer for Self-Interference Cancellation. - Dirk-Jan van den Broek; Eric A. M. Klumperink; Bram Nauta (IEEE J. Solid State Circuits, 2015)

Compact Cascadable g m -C All-Pass True Time Delay Cell With Reduced Delay Variation Over Frequency. - Seyed Kasra Garakoui; Eric A. M. Klumperink; Bram Nauta; Frank E. van Vliet (IEEE J. Solid State Circuits, 2015)

A High-Linearity Digital-to-Time Converter Technique: Constant-Slope Charging. - Jiayoon Zhiyu Ru; Claudia Palattella; Paul F. J. Geraedts; Eric A. M. Klumperink; Bram Nauta (IEEE J. Solid State Circuits, 2015)

RF Transconductor Linearization Robust to Process, Voltage and Temperature Variations. - Harish Kundur Subramaniyan; Eric A. M. Klumperink; Venkatesh Srinivasan; Ali Kiaei; Bram Nauta (IEEE J. Solid State Circuits, 2015)

Analysis of the Signal Transfer and Folding in N-Path Filters With a Series Inductance. - Lammert Duipmans; Remko E. Struiksma; Eric A. M. Klumperink; Bram Nauta; Frank E. van Vliet (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

A Sensitive Method to Measure the Integral Nonlinearity of a Digital-to-Time Converter Based on Phase Modulation. - Claudia Palattella; Eric A. M. Klumperink; Jiayun Ru; Bram Nauta (IEEE Trans. Circuits Syst. II Express Briefs, 2015)

EE4: Eureka! The best moments of solid-state circuit design in the 2000s. - Woogeun Rhee; Eric A. M. Klumperink; Hossein Hashemi 001 (ISSCC, 2016)

Introduction to the December Special Issue on the 2016 IEEE International Solid-State Circuits Conference. - Edgar Sánchez-Sinencio; Jan Mulder; Antonio Liscidini; Eric A. M. Klumperink; Elad Alon (IEEE J. Solid State Circuits, 2016)

A digital sine-weighted switched-Gm mixer for single-clock power-scalable parallel receivers. - Reda Kasri; Eric A. M. Klumperink; Philippe Cathelin; Eric Toumier; Bram Nauta (CICC, 2017)

N-path filters and mixer-first receivers: A review. - Eric A. M. Klumperink; Hugo J. Westerveld; Bram Nauta (CICC, 2017)

Multi-phase sub-sampling fractional-N PLL with soft loop switching for fast robust locking. - Dongyi Liao; Fa Foster Dai; Bram Nauta; Eric A. M. Klumperink (CICC, 2017)

24.3 A high-linearity CMOS receiver achieving +44dBm IIP3 and +13dBm B1dB for SAW-less LTE radio. - Yuanching Lien; Eric A. M. Klumperink; Bernard Tenbroek; Jon Strange; Bram Nauta (ISSCC, 2017)

Beamformer With Constant-Gm Vector Modulators and Its Spatial Intermodulation Distortion. - Michiel C. M. Soer; Eric A. M. Klumperink; Dirk-Jan van den Broek; Bram Nauta; Frank E. van Vliet (IEEE J. Solid State Circuits, 2017)

Simplified Unified Analysis of Switched-RC Passive Mixers, Samplers, and N-Path Filters Using the Adjoint Network. - Shanthi Pavan; Eric A. M. Klumperink (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

A 2.4-GHz 16-Phase Sub-Sampling Fractional-N PLL With Robust Soft Loop Switching. - Dongyi Liao; Fa Foster Dai; Bram Nauta; Eric A. M. Klumperink (IEEE J. Solid State Circuits, 2018)

Enhanced-Selectivity High-Linearity Low-Noise Mixer-First Receiver With Complex Pole Pair Due to Capacitive Positive Feedback. - Yuanching Lien; Eric A. M. Klumperink; Bernard Tenbroek; Jon Strange; Bram Nauta (IEEE J. Solid State Circuits, 2018)

Analysis of the Effect of Source Capacitance and Inductance on $N$ -Path Mixers and Filters. - Shanthi Pavan; Eric A. M. Klumperink (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

Generalized Analysis of High-Order Switch-RC N-Path Mixers/Filters Using the Adjoint Network. - Shanthi Pavan; Eric A. M. Klumperink (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

Feedforward Phase Noise Cancellation Exploiting a Sub-Sampling Phase Detector. - Bart J. Thijssen; Eric A. M. Klumperink; Philip Quinlan; Bram Nauta (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

A Wideband IF Receiver Module for Flexibly Scalable mmWave Beamforming Combining and Interference Cancellation. - Rehman Akbar; Eric A. M. Klumperink; Nuutti Tervo; Muhammad Yasir Javed; Kari Stadius; Timo Rahkonen; Aarno Pärssinen (ESSCIRC, 2019)

A 0.06-3.4-MHz 92-μW Analog FIR Channel Selection Filter With Very Sharp Transition Band for IoT Receivers. - Bart J. Thijssen; Eric A. M. Klumperink; Philip Quinlan; Bram Nauta (ESSCIRC, 2019)

High-Linearity Bottom-Plate Mixing Technique With Switch Sharing for N-path Filters/Mixers. - Yuanching Lien; Eric A. M. Klumperink; Bernard Tenbroek; Jon Strange; Bram Nauta (IEEE J. Solid State Circuits, 2019)

Improving Receiver Close-In Blocker Tolerance by Baseband Gm-C Notch Filtering. - Mohammed Abdulaziz; Eric A. M. Klumperink; Bram Nauta; Henrik Sjöland (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

Digital-to-Frequency Converters With a DTC: Theoretical Analysis of the Output SFDR. - Claudia Palattella; Eric A. M. Klumperink; Mark S. Oude Alink; Bram Nauta (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

30.4 A 370µW 5.5dB-NF BLE/BT5.0/IEEE 802.15.4-Compliant Receiver with >63dB Adjacent Channel Rejection at >2 Channels Offset in 22nm FDSOI. - Bart J. Thijssen; Eric A. M. Klumperink; Philip Quinlan; Bram Nauta (ISSCC, 2020)

EVM-based Performance Evaluation of Co-channel Interference Mitigation using Spatial Filtering for Digital MIMO Receivers. - Sajad Golabighezelahmad; Eric A. M. Klumperink; Bram Nauta (VTC Fall, 2020)

A Fully Passive RF Front End With 13-dB Gain Exploiting Implicit Capacitive Stacking in a Bottom-Plate N-Path Filter/Mixer. - Vijaya Kumar Purushothaman; Eric A. M. Klumperink; Berta Trullas Clavera; Bram Nauta (IEEE J. Solid State Circuits, 2020)

Low-Power Highly Selective Channel Filtering Using a Transconductor-Capacitor Analog FIR. - Bart J. Thijssen; Eric A. M. Klumperink; Philip Quinlan; Bram Nauta (IEEE J. Solid State Circuits, 2020)

Analysis of Switched Capacitor Losses in Polar and Quadrature Switched Capacitor PAs. - Joep Zanen; Eric A. M. Klumperink; Bram Nauta (IEEE Trans. Circuits Syst. II Express Briefs, 2020)

Multi-Receiver Cross-Correlation Technique for (B)FSK Radios. - Vijaya Kumar Purushothaman; Mina R. M. Mikhael; Mark S. Oude Alink; Eric A. M. Klumperink; André B. J. Kokkeler; Bram Nauta (IEEE Access, 2021)

A 0.7-5.7 GHz Reconfigurable MIMO Receiver Architecture for Analog Spatial Notch Filtering Using Orthogonal Beamforming. - Sajad Golabighezelahmad; Eric A. M. Klumperink; Bram Nauta (IEEE J. Solid State Circuits, 2021)

2.4-GHz Highly Selective IoT Receiver Front End With Power Optimized LNTA, Frequency Divider, and Baseband Analog FIR Filter. - Bart J. Thijssen; Eric A. M. Klumperink; Philip Quinlan; Bram Nauta (IEEE J. Solid State Circuits, 2021)

Simplified Harmonic Rejection Mixer Analysis and Design Based on a Filtered Periodic Impulse Model. - Pieter-Tjerk de Boer; Mark S. Oude Alink; Eric A. M. Klumperink (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

Power Efficiency Model for MIMO Transmitters Including Memory Polynomial Digital Predistortion. - Joep Zanen; Eric A. M. Klumperink; Bram Nauta (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

Low-Power High-Linearity Mixer-First Receiver Using Implicit Capacitive Stacking With 3× Voltage Gain. - Vijaya Kumar Purushothaman; Eric A. M. Klumperink; Roel Plompen; Bram Nauta (IEEE J. Solid State Circuits, 2022)

Figures of Merit for CMOS Low-Noise Amplifiers and Estimates for Their Theoretical Limits. - Leonid Belostotski; Eric A. M. Klumperink (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

A Predistortion-Less Digital MIMO Transmitter With DTC-Based Quadrature Imbalance Compensation. - Joep Zanen; Eric A. M. Klumperink; Bram Nauta (IEEE J. Solid State Circuits, 2023)

Time Modulated Array and Time Variant Filter Techniques to Reduce Receiver Hardware Complexity and Power Consumption. - Viswesh Kendae Ramkumar; Harijot Singh Bindra; Eric A. M. Klumperink; Basem Abdelaziz Abdelmagid; H. Wang (EuCNC/6G Summit, 2025)

Analysis and Design of a Low-Loss 1-10 GHz Capacitive Stacking N-Path Filter/Mixer. - Emiel Zijlma; Stef van Zanten; Roel Plompen; Eric A. M. Klumperink; Ronan A. R. van der Zee; Bram Nauta (IEEE J. Solid State Circuits, 2025)

A Dual-Alternating-Slope Digital-to-Time Converter Leveraging Mismatch to Improve Delay Step Size. - Nimit Jain; Eric A. M. Klumperink; Harm van Rumpt; Bram Nauta (IEEE J. Solid State Circuits, 2025)

A Programmable Filtering and Frequency Translation by Aliasing IF Receiver With Alias and Harmonic Rejection. - Viswesh Kendae Ramkumar; Maikel Huiskamp; Harijot Singh Bindra; Eric A. M. Klumperink; Bram Nauta (IEEE J. Solid State Circuits, 2025)

Selectivity Versus Noise Trade-Offs in Resistively Driven Passive Switched-Capacitor Infinite Impulse Response Low-Pass Filters. - Roel Plompen; Jeroen Ponte; Stef van Zanten; Eric A. M. Klumperink; Bram Nauta (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)