Loose Loops Sink Chips. - Eric Borch; Eric Tune; Srilatha Manne; Joel S. Emer (HPCA, 2002)

Asim: A Performance Model Framework. - Joel S. Emer; Pritpal S. Ahuja; Eric Borch; Artur Klauser; Chi-Keung Luk; Srilatha Manne; Shubhendu S. Mukherjee; Harish Patil; Steven Wallace; Nathan L. Binkert; Roger Espasa; Toni Juan (Computer, 2002)

Achieving Non-Inclusive Cache Performance with Inclusive Caches: Temporal Locality Aware (TLA) Cache Management Policies. - Aamer Jaleel; Eric Borch; Malini Bhandaru; Simon C. Steely Jr.; Joel S. Emer (MICRO, 2010)

A Unified Algorithm for Both Randomized Deterministic and Adaptive Routing in Torus Networks. - Keith D. Underwood; Eric Borch (IPDPS Workshops, 2011)

Exploiting communication and packaging locality for cost-effective large scale networks. - Keith D. Underwood; Eric Borch (ICS, 2012)

Evaluating on-die interconnects for a 4 TB/s router. - Keith D. Underwood; Eric Borch; John Sizer; Timothy Stremcha; Michael Strom (ICS, 2013)

Megafly: A Topology for Exascale Systems. - Mario Flajslik; Eric Borch; Mike A. Parker (ISC, 2018)

Evaluating Quality of Service Traffic Classes on the Megafly Network. - Misbah Mubarak; Neil McGlohon; Malek Musleh; Eric Borch; Robert B. Ross; Ram Huggahalli; Sudheer Chunduri; Scott Parker; Christopher D. Carothers; Kalyan Kumaran (ISC, 2019)

A Tunable Implementation of Quality-of-Service Classes for HPC Networks. - Kevin A. Brown; Neil McGlohon; Sudheer Chunduri; Eric Borch; Robert B. Ross; Christopher D. Carothers; Kevin Harms (ISC, 2021)