A 1.8 V pseudo-differential switched-capacitor amplifier. - Zeki Sezgin Günay; Eric G. Soenen; Sherif H. K. Embabi; Edgar Sánchez-Sinencio (CICC, 1998)

A robust digital DC-DC converter with rail-to-rail output range in 40nm CMOS. - Eric G. Soenen; Alan Roth; Justin Shi; Martin Kinyua; Justin Gaither; Elizabeth Ortynska (ISSCC, 2010)

A wide-range DC/DC converter with 2nd order digital compensation and direct battery connection in 40nm CMOS. - Justin Shi; Ying-Chih Hsu; Eric G. Soenen; Alan Roth; Justin Gaither (CICC, 2011)

Practical Considerations for a Digital Inductive-Switching DC/DC Converter With Direct Battery Connect in Deep Sub-Micron CMOS. - Justin Shi; Eric G. Soenen; Alan Roth; Ying-Chih Hsu; Martin Kinyua (IEEE J. Solid State Circuits, 2012)

A 105dBA SNR, 0.0031% THD+N filterless class-D amplifier with discrete time feedback control in 55nm CMOS. - Martin Kinyua; Ruopeng Wang; Eric G. Soenen (CICC, 2014)

A digital low drop-out regulator with wide operating range in a 16nm FinFET CMOS process. - Chia-Liang Tai; Alan Roth; Eric G. Soenen (A-SSCC, 2015)

A temperature sensor with a 3 sigma inaccuracy of ±2°C without trimming from -50°C to 150°C in a 16nm FinFET process. - Mei-Chen Chuang; Chia-Liang Tai; Ying-Chih Hsu; Alan Roth; Eric G. Soenen (ESSCIRC, 2015)

Integrated 105 dB SNR, 0.0031% THD+N Class-D Audio Amplifier With Global Feedback and Digital Control in 55 nm CMOS. - Martin Kinyua; Ruopeng Wang; Eric G. Soenen (IEEE J. Solid State Circuits, 2015)

5.9 An 18.75µW dynamic-distributing-bias temperature sensor with 0.87°C(3σ) untrimmed inaccuracy and 0.00946mm2 area. - Ying-Chih Hsu; Chia-Liang Tai; Mei-Chen Chuang; Alan Roth; Eric G. Soenen (ISSCC, 2017)

A 43-mW MASH 2-2 CT ΣΔ Modulator Attaining 74.4/75.8/76.8 dB of SNDR/SNR/DR and 50 MHz of BW in 40-nm CMOS. - Alexander Edward; Qiyuan Liu 001; Carlos Briseno-Vidrios; Martin Kinyua; Eric G. Soenen; Aydin Ilker Karsilayan; José Silva-Martínez (IEEE J. Solid State Circuits, 2017)

A Low-Power Digitizer for Back-Illuminated 3-D-Stacked CMOS Image Sensor Readout With Passing Window and Double Auto-Zeroing Techniques. - Qiyuan Liu 001; Alexander Edward; Martin Kinyua; Eric G. Soenen; José Silva-Martínez (IEEE J. Solid State Circuits, 2017)

A 44-fJ/Conversion Step 200-MS/s Pipeline ADC Employing Current-Mode MDACs. - Carlos Briseno-Vidrios; Dadian Zhou; Suraj Prakash; Qiyuan Liu 001; Alexander Edward; Eric G. Soenen; Martin Kinyua; José Silva-Martínez (IEEE J. Solid State Circuits, 2018)

A 27.7 fJ/conv-step 500 MS/s 12-Bit Pipelined ADC Employing a Sub-ADC Forecasting Technique and Low-Power Class AB Slew Boosted Amplifiers. - Mohammad H. Naderi; Chulhyun Park; Suraj Prakash; Martin Kinyua; Eric G. Soenen; José Silva-Martínez (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

A 13-Bit 260MS/s Power-Efficient Pipeline ADC Using a Current-Reuse Technique and Interstage Gain and Nonlinearity Errors Calibration. - Dadian Zhou; Carlos Briseno-Vidrios; Junning Jiang; Chulhyun Park; Qiyuan Liu 001; Eric G. Soenen; Martin Kinyua; José Silva-Martínez (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

A 72.6 dB SNDR 14b 100 MSPS Ring Amplifier Based Pipelined SAR ADC with Dynamic Deadzone Control in 16 nm CMOS. - Martin Kinyua; Eric G. Soenen (CICC, 2020)

A 245-mA Digitally Assisted Dual-Loop Low-Dropout Regulator. - Dadian Zhou; Junning Jiang; Qiyuan Liu 001; Eric G. Soenen; Martin Kinyua; José Silva-Martínez (IEEE J. Solid State Circuits, 2020)