Eric D. Marsman

Orcid: 0000-0002-9902-1973

According to our database1, Eric D. Marsman authored at least 18 papers between 2001 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2020
ULAMA: A Utilization-Aware Matching Approach for robust on-demand spatial service brokers.
Future Gener. Comput. Syst., 2020

2017
Supply and Demand Aware Synthetic Data Generation for On-demand Traffic with Real-world Characteristics.
Proceedings of the 10th ACM SIGSPATIAL Workshop on Computational Transportation Science, 2017

2016
Supply-demand ratio and on-demand spatial service brokers: a summary of results.
Proceedings of the 9th ACM SIGSPATIAL International Workshop on Computational Transportation Science, 2016

2010
Hybrid on-chip clocking for sensor nodes.
Proceedings of the 2010 International Symposium on System on Chip, SoC 2010, Tampere, 2010

2009
A 25-MHz Self-Referenced Solid-State Frequency Source Suitable for XO-Replacement.
IEEE Trans. Circuits Syst. I Regul. Pap., 2009

2008
A 0.5-to-480MHz Self-Referenced CMOS Clock Generator with 90ppm Total Frequency Error and Spread-Spectrum Capability.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

A 25MHz all-CMOS reference clock generator for XO-replacement in serial wire interfaces.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2006
Low-latency, HDL-synthesizable dynamic clock frequency controller with self-referenced hybrid clocking.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

DSP architecture for cochlear implants.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A 16-bit, low-power microsystem with monolithic MEMS-<i>LC</i> clocking.
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

2005
Partitioning Variables across Register Windows to Reduce Spill Code in a Low-Power Processor.
IEEE Trans. Computers, 2005

A 16-bit low-power microcontroller with monolithic MEMS-LC clocking.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache.
Proceedings of the 3nd IEEE / ACM International Symposium on Code Generation and Optimization (CGO 2005), 2005

2003
Microsystem and SoC Design with UMIPS.
Proceedings of the IFIP VLSI-SoC 2003, 2003

A Top-Down Microsystems Design Methodology and Associated Challenges .
Proceedings of the 2003 Design, 2003

A 16-bit mixed-signal microsystem with integrated CMOS-MEMS clock reference.
Proceedings of the 40th Design Automation Conference, 2003

Increasing the number of effective registers in a low-power processor using a windowed register file.
Proceedings of the International Conference on Compilers, 2003

2001
Performance analysis using pipeline visualization.
Proceedings of the 2001 IEEE International Symposium on Performance Analysis of Systems and Software, 2001


  Loading...