Defect Coverage Analysis of Partitioned Testing. - Sreejit Chakravarty; Eric W. Savage; Eric N. Tran (ITC, 2004)

Logic proximity bridges. - Eric N. Tran; Vamsee Krishna; Sujit T. Zachariah; Sreejit Chakravarty (ITC, 2005)

Experimental Evaluation of Bridge Patterns for a High Performance Microprocessor. - Sreejit Chakravarty; Yi-Shing Chang; Hiep Hoang; Sridhar Jayaraman; Silvio Picano; Cheryl Prunty; Eric W. Savage; Rehan Sheikh; Eric N. Tran; Khen Wee (VTS, 2005)

Silicon Evaluation of Logic Proximity Bridge Patterns. - Eric N. Tran; Vishwashanth Kasulasrinivas; Sreejit Chakravarty (VTS, 2006)