A Mixed-Signal Binarized Convolutional-Neural-Network Accelerator Integrating Dense Weight Storage and Multiplication for Reduced Data Movement. - Hossein Valavi; Peter J. Ramadge; Eric Nestler; Naveen Verma (VLSI Circuits, 2018)

A 64-Tile 2.4-Mb In-Memory-Computing CNN Accelerator Employing Charge-Domain Compute. - Hossein Valavi; Peter J. Ramadge; Eric Nestler; Naveen Verma (IEEE J. Solid State Circuits, 2019)