Context-aware control of smart objects via human-machine communication. - Md Muztoba; Eric Qin 001; Nicholas Tran; Ümit Y. Ogras (BioCAS, 2015)

Architecture, Chip, and Package Co-design Flow for 2.5D IC Design Enabling Heterogeneous IP Reuse. - Jinwoo Kim; Gauthaman Murali; Heechun Park; Eric Qin 001; Hyoukjun Kwon; Venkata Chaitanya Krishna Chekuri; Nihar Dasari; Arvind Singh; Minah Lee; Hakki Mert Torun; Kallol Roy; Madhavan Swaminathan; et al. (DAC, 2019)

K-TanH: Hardware Efficient Activations For Deep Learning. - Abhisek Kundu; Sudarshan Srinivasan; Eric C. Qin; Dhiraj D. Kalamkar; Naveen K. Mellempudi; Dipankar Das 002; Kunal Banerjee 001; Bharat Kaul; Pradeep Dubey (CoRR, 2019)

SIGMA: A Sparse and Irregular GEMM Accelerator with Flexible Interconnects for DNN Training. - Eric Qin 001; Ananda Samajdar; Hyoukjun Kwon; Vineet Nadella; Sudarshan Srinivasan; Dipankar Das 002; Bharat Kaul; Tushar Krishna (HPCA, 2020)

Architecture, Chip, and Package Codesign Flow for Interposer-Based 2.5-D Chiplet Integration Enabling Heterogeneous IP Reuse. - Jinwoo Kim; Gauthaman Murali; Heechun Park; Eric Qin 001; Hyoukjun Kwon; Venkata Chaitanya Krishna Chekuri; Nael Mizanur Rahman; Nihar Dasari; Arvind Singh; Minah Lee; Hakki Mert Torun; Kallol Roy; et al. (IEEE Trans. Very Large Scale Integr. Syst., 2020)

RASA: Efficient Register-Aware Systolic Array Matrix Engine for CPU. - Geonhwa Jeong; Eric Qin 001; Ananda Samajdar; Christopher J. Hughes; Sreenivas Subramoney; Hyesoon Kim; Tushar Krishna (DAC, 2021)

Extending Sparse Tensor Accelerators to Support Multiple Compression Formats. - Eric Qin 001; Geonhwa Jeong; William Won; Sheng-Chun Kao; Hyoukjun Kwon; Sudarshan Srinivasan; Dipankar Das 002; Gordon Euhyun Moon; Sivasankaran Rajamanickam; Tushar Krishna (IPDPS, 2021)

A Taxonomy for Classification and Comparison of Dataflows for GNN Accelerators. - Raveesh Garg; Eric Qin 001; Francisco Muñoz-Martínez; Robert Guirado; Akshay Jain 001; Sergi Abadal; José L. Abellán; Manuel E. Acacio; Eduard Alarcón; Sivasankaran Rajamanickam; Tushar Krishna (CoRR, 2021)

Clock Delivery Network Design and Analysis for Interposer-Based 2.5-D Heterogeneous Systems. - Gauthaman Murali; Heechun Park; Eric Qin 001; Hakki Mert Torun; Majid Ahadi Dolatsara; Madhavan Swaminathan; Tushar Krishna; Sung Kyu Lim (IEEE Trans. Very Large Scale Integr. Syst., 2021)

Self adaptive reconfigurable arrays (SARA): learning flexible GEMM accelerator configuration and mapping-space using ML. - Ananda Samajdar; Eric Qin 001; Michael Pellauer; Tushar Krishna (DAC, 2022)

Understanding the Design-Space of Sparse/Dense Multiphase GNN dataflows on Spatial Accelerators. - Raveesh Garg; Eric Qin 001; Francisco Muñoz-Martínez; Robert Guirado; Akshay Jain 001; Sergi Abadal; José L. Abellán; Manuel E. Acacio; Eduard Alarcón; Sivasankaran Rajamanickam; Tushar Krishna (IPDPS, 2022)

Enabling Flexibility for Sparse Tensor Acceleration via Heterogeneity. - Eric Qin 001; Raveesh Garg; Abhimanyu Bambhaniya; Michael Pellauer; Angshuman Parashar; Sivasankaran Rajamanickam; Cong Hao; Tushar Krishna (CoRR, 2022)

Building Efficient Tensor Accelerators for Sparse and Irregular Workloads. - Eric Qin 001 (2022)

VEGETA: Vertically-Integrated Extensions for Sparse/Dense GEMM Tile Acceleration on CPUs. - Geonhwa Jeong; Sana Damani; Abhimanyu Rajeshkumar Bambhaniya; Eric Qin 001; Christopher J. Hughes; Sreenivas Subramoney; Hyesoon Kim; Tushar Krishna (HPCA, 2023)

PipeOrgan: Efficient Inter-operation Pipelining with Flexible Spatial Organization and Interconnects. - Raveesh Garg; Hyoukjun Kwon; Eric Qin 001; Yu-Hsin Chen; Tushar Krishna; Liangzhen Lai (CoRR, 2024)