A Power Estimation Model for High-Speed CMOS A/D Converters. - Erik Lauwers; Georges G. E. Gielen (DATE, 1999)

High-level simulation and power modelling of mixed-signal front-ends for digital telecommunications. - Piet Wambacq; Gerd Vandersteen; Stéphane Donnay; Marc Engels; Ivo Bolsens; Erik Lauwers; Piet Vanassche; Georges G. E. Gielen (ICECS, 1999)

High-Level Design Case of a Switched-Capacitor Low-Pass Filter Using Verilog-A. - Erik Lauwers; Georges G. E. Gielen; Koen Lampaert; Paolo Miliozzi (BMAS, 2000)

ACTIF: A High-Level Power Estimation Tool for Analog Continuous-Time-Filters. - Erik Lauwers; Georges G. E. Gielen (ICCAD, 2000)

A CMOS multiparameter biochemical microsensor with temperature control and signal interfacing. - Erik Lauwers; Jan Suls; Walter Gumbrecht; David Maes; Georges G. E. Gielen; Willy Sansen (IEEE J. Solid State Circuits, 2001)

A 8-bit 200 MS/s interpolating/averaging CMOS A/D converter. - Jan Vandenbussche; Koen Uyttenhove; Erik Lauwers; Michel S. J. Steyaert; Georges G. E. Gielen (CICC, 2002)

Systematic design of a 200 MS/s 8-bit interpolating/averaging A/D converter. - Jan Vandenbussche; Koen Uyttenhove; Erik Lauwers; Michiel Steyaert; Georges G. E. Gielen (DAC, 2002)

Systematic Design of a 200 Ms/S 8-bit Interpolating A/D Converter. - Jan Vandenbussche; Erik Lauwers; Koen Uyttenhove; Michiel Steyaert; Georges G. E. Gielen (DATE, 2002)

Regression criteria and their application in different modeling cases. - Francky Leyn; Erik Lauwers; Martin Vogels; Georges G. E. Gielen; Willy M. C. Sansen (ISCAS (5), 2002)

Power estimation methods for analog circuits for architectural exploration of integrated systems. - Erik Lauwers; Georges G. E. Gielen (IEEE Trans. Very Large Scale Integr. Syst., 2002)

Design techniques and implementation of an 8-bit 200-MS/s interpolating/averaging CMOS A/D converter. - Koen Uyttenhove; Jan Vandenbussche; Erik Lauwers; Georges G. E. Gielen; Michiel S. J. Steyaert (IEEE J. Solid State Circuits, 2003)