A Register Allocation Framework Based on Hierarchical Cyclic Interval Graphs. - Laurie J. Hendren; Guang R. Gao; Erik R. Altman; Chandrika Mukerji (CC, 1992)

A Novel Methodology Using Genetic Algorithms for the Design of Caches and Cache Replacement Policy. - Erik R. Altman; Vinod K. Agarwal; Guang R. Gao (ICGA, 1993)

A Comparative Study of Multiprocessor List Scheduling Heuristics. - Guoning Liao; Erik R. Altman; Vinod K. Agarwal; Guang R. Gao (HICSS (1), 1994)

Minimizing register requirements under resource-constrained rate-optimal software pipelining. - Ramaswamy Govindarajan; Erik R. Altman; Guang R. Gao (MICRO, 1994)

An Experimental Study of an ILP-based Exact Solution Method for Software Pipelining. - Erik R. Altman; Guang R. Gao; Ramaswamy Govindarajan (LCPC, 1995)

Scheduling and Mapping: Software Pipelining in the Presence of Structural Hazards. - Erik R. Altman; Ramaswamy Govindarajan; Guang R. Gao (PLDI, 1995)

Optimal Software Pipelining Through Enumeration of Schedules. - Erik R. Altman; Guang R. Gao (Euro-Par, Vol. II, 1996)

Co-Scheduling Hardware and Software Pipelines. - Ramaswamy Govindarajan; Erik R. Altman; Guang R. Gao (HPCA, 1996)

A Framework for Resource-Constrained Rate-Optimal Software Pipelining. - Ramaswamy Govindarajan; Erik R. Altman; Guang R. Gao (IEEE Trans. Parallel Distributed Syst., 1996)

DAISY: Dynamic Compilation for 100% Architectural Compatibility. - Kemal Ebcioglu; Erik R. Altman (ISCA, 1997)

Simulation/evaluation environment for a VLIW processor architecture. - Jaime H. Moreno; Mayan Moudgill; Kemal Ebcioglu; Erik R. Altman; C. Brian Hall; Rene Miranda; Shyh-Kwei Chen; Arkady Polyak (IBM J. Res. Dev., 1997)

An eight-issue tree-VLIW processor for dynamic binary translation. - Kemal Ebcioglu; Jason Fritts; Stephen Kosonocky; Michael Gschwind; Erik R. Altman; Krishnan Kailas; Terry Bright (ICCD, 1998)

An Enhanced Co-Scheduling Method Using Reduced MS-State Diagrams. - Ramaswamy Govindarajan; N. S. S. Narasimha Rao; Erik R. Altman; Guang R. Gao (IPPS/SPDP, 1998)

Optimal Modulo Scheduling Through Enumeration. - Erik R. Altman; Guang R. Gao (Int. J. Parallel Program., 1998)

A Unified Framework for Instruction Scheduling and Mapping for Function Units with Structural Hazards. - Erik R. Altman; Ramaswamy Govindarajan; Guang R. Gao (J. Parallel Distributed Comput., 1998)

LaTTe: A Java VM Just-In-Time Compiler with Fast and Efficient Register Allocation. - Byung-Sun Yang; Soo-Mook Moon; Seongbae Park; Junpyo Lee; SeungIl Lee; Jinpyo Park; Yoo C. Chung; Suhyun Kim 001; Kemal Ebcioglu; Erik R. Altman (IEEE PACT, 1999)

Execution-Based Scheduling for VLIW Architectures. - Kemal Ebcioglu; Erik R. Altman; Sumedh W. Sathaye; Michael Gschwind (Euro-Par, 1999)

Optimizations and Oracle Parallelism with Dynamic Translation. - Kemal Ebcioglu; Erik R. Altman; Sumedh W. Sathaye; Michael Gschwind (MICRO, 1999)

Lightweight monitor for Java VM. - Byung-Sun Yang; Junpyo Lee; Jinpyo Park; Soo-Mook Moon; Kemal Ebcioglu; Erik R. Altman (SIGARCH Comput. Archit. News, 1999)

A Theory for Software-Hardware Co-Scheduling for ASIPs and Embedded Processors. - Ramaswamy Govindarajan; Erik R. Altman; Guang R. Gao (ASAP, 2000)

Binary translation and architecture convergence issues for IBM system/390. - Michael Gschwind; Kemal Ebcioglu; Erik R. Altman; Sumedh W. Sathaye (ICS, 2000)

Efficient Java exception handling in just-in-time compilation. - SeungIl Lee; Byung-Sun Yang; Suhyun Kim 001; Seongbae Park; Soo-Mook Moon; Kemal Ebcioglu; Erik R. Altman (Java Grande, 2000)

Welcome to the Opportunities of Binary Translation. - Erik R. Altman; David R. Kaeli; Yaron Sheffer (Computer, 2000)

Dynamic and Transparent Binary Translation. - Michael Gschwind; Erik R. Altman; Sumedh W. Sathaye; Paul Ledak; David Appenzeller (Computer, 2000)

Enhanced Co-Scheduling: A Software Pipelining Method Using Modulo-Scheduled Pipeline Theory. - Ramaswamy Govindarajan; N. S. S. Narasimha Rao; Erik R. Altman; Guang R. Gao (Int. J. Parallel Program., 2000)

Reducing virtual call overheads in a Java VM just-in-time compiler. - Junpyo Lee; Byung-Sun Yang; Suhyun Kim 001; Kemal Ebcioglu; Erik R. Altman; SeungIl Lee; Yoo C. Chung; Heungbok Lee; Je-Hyung Lee; Soo-Mook Moon (SIGARCH Comput. Archit. News, 2000)

Advances and future challenges in binary translation and optimization. - Erik R. Altman; Kemal Ebcioglu; Michael Gschwind; Sumedh Sathaye (Proc. IEEE, 2001)

WBT-2000: workshop on binary translation - 2000. - Erik R. Altman; David R. Kaeli (SIGARCH Comput. Archit. News, 2001)

Workshop on binary translation - 2001. - Erik R. Altman; David R. Kaeli (SIGARCH Comput. Archit. News, 2001)

Optimization and precise exceptions in dynamic compilation. - Michael Gschwind; Erik R. Altman (SIGARCH Comput. Archit. News, 2001)

Dynamic Binary Translation and Optimization. - Kemal Ebcioglu; Erik R. Altman; Michael Gschwind; Sumedh W. Sathaye (IEEE Trans. Computers, 2001)

Precise Exception Semantics in Dynamic Compilation. - Michael Gschwind; Erik R. Altman (CC, 2002)

A Theory for Co-Scheduling Hardware and Software Pipelines in ASIPs and Embedded Processors. - R. Govindarajan; Erik R. Altman; Guang R. Gao (Des. Autom. Embed. Syst., 2002)

VLaTTe: A Java Just-in-Time Compiler for VLIW with Fast Scheduling and Register Allocation. - Suhyun Kim 001; Soo-Mook Moon; Kemal Ebcioglu; Erik R. Altman (IEICE Trans. Inf. Syst., 2004)

05101 Executive Summary - Scheduling for Parallel Architectures: Theory, Applications, Challenges. - Erik R. Altman; James C. Dehnert; Christoph W. Kessler; Jens Knoop (Scheduling for Parallel Architectures, 2005)

05101 Abstracts Collection - Scheduling for Parallel Architectures: Theory, Applications, Challenges. - Erik R. Altman; James C. Dehnert; Christoph W. Kessler; Jens Knoop (Scheduling for Parallel Architectures, 2005)

Panel Discussion: Architectures for the Future. - Erik R. Altman (ISPASS, 2005)

Preface. - Erik R. Altman; Sumedh W. Sathaye (IBM J. Res. Dev., 2006)

Efficient Register Mapping and Allocation in LaTTe, an Open-Source Java Just-in-Time Compiler. - Byung-Sun Yang; Junpyo Lee; SeungIl Lee; Seongbae Park; Yoo C. Chung; Suhyun Kim 001; Kemal Ebcioglu; Erik R. Altman; Soo-Mook Moon (IEEE Trans. Parallel Distributed Syst., 2007)

08441 Final Report - Emerging Uses and Paradigms for Dynamic Binary Translation. - Erik R. Altman; Bruce R. Childers; Robert S. Cohn; Jack W. Davidson; Koen De Bosschere; Bjorn De Sutter; M. Anton Ertl; Michael Franz; Yuan Xiang Gu; Matthias Hauswirth; Thomas Heinz 001; Wei-Chung Hsu; et al. (Emerging Uses and Paradigms for Dynamic Binary Translation, 2008)

Performance analysis of idle programs. - Erik R. Altman; Matthew Arnold; Stephen Fink; Nick Mitchell (OOPSLA, 2010)

Observations on tuning a Java enterprise application for performance and scalability. - Erik R. Altman; Matthew Arnold; Rajesh Bordawekar; Robert M. Delmonico; Nick Mitchell; Peter F. Sweeney (IBM J. Res. Dev., 2010)

The language, optimizer, and tools mess. - Erik R. Altman (CGO, 2011)

A Solid Past, A Vital Future. - Erik R. Altman (IEEE Micro, 2011)

Hot Chips and Remembering a Pioneer. - Erik R. Altman (IEEE Micro, 2011)

Very Large-Scale Systems and Some History. - Erik R. Altman (IEEE Micro, 2011)

Big Chips and Beyond. - Erik R. Altman (IEEE Micro, 2011)

CPUs and GPUs: Who Owns the Future? - Erik R. Altman (IEEE Micro, 2011)

New Blood, Cool Chips, and Heterogeneous Designs. - Erik R. Altman (IEEE Micro, 2011)

Micro Evolution. - Erik R. Altman (IEEE Micro, 2012)

Top Picks, Columnists, and Artists. - Erik R. Altman (IEEE Micro, 2012)

The Odd Couple: Hardware and Software. - Erik R. Altman (IEEE Micro, 2012)

Power- and Energy-Aware Computing. - Erik R. Altman (IEEE Micro, 2012)

Hot Interconnects and Hot Topics - Erik R. Altman (IEEE Micro, 2012)

The Liquid Metal Blokus Duo Design. - Erik R. Altman; Joshua S. Auerbach; David F. Bacon; Ioana Baldini; Perry Cheng; Stephen J. Fink; Rodric M. Rabbah (FPT, 2013)

SGB fortifies global SIG community. - Erik R. Altman (Commun. ACM, 2013)

Preface. - Erik R. Altman; Weisong Shi (J. Comput. Sci. Technol., 2013)

Hot Chips and the Incomplete Job of Exploiting Them. - Erik R. Altman (IEEE Micro, 2013)

Ten Years of Top Picks. - Erik R. Altman (IEEE Micro, 2013)

Reliability, Theme Issues, and Plagiarism. - Erik R. Altman (IEEE Micro, 2013)

Dark Silicon and Dangerous Predictions. - Erik R. Altman (IEEE Micro, 2013)

Cool Chips, Mobile Devices, Memory, and IEEE Micro Going Digital. - Erik R. Altman (IEEE Micro, 2013)

Towards an automated approach to use expert systems in the performance testing of distributed systems. - A. Omar Portillo-Dominguez; Miao Wang 002; John Murphy 001; Damien Magoni; Nick Mitchell; Peter F. Sweeney; Erik R. Altman (JAMAICA@ISSTA, 2014)

Predicting GPU Performance from CPU Runs Using Machine Learning. - Ioana Baldini; Stephen J. Fink; Erik R. Altman (SBAC-PAD, 2014)

Reconfigurable Computing, 3D Integration, and Recognizing Leaders in our Field. - Erik R. Altman (IEEE Micro, 2014)

Top Picks from 2013. - Erik R. Altman (IEEE Micro, 2014)

Big Data and Democratization [Editorial]. - Erik R. Altman (IEEE Micro, 2014)

Patents and High-Speed Datacenter Interconnects. - Erik R. Altman (IEEE Micro, 2014)

Harsh Chips, but a Grateful Good-Bye. - Erik R. Altman (IEEE Micro, 2014)

Synthesizing Credit Card Transactions. - Erik R. Altman (CoRR, 2019)

Tabular Transformers for Modeling Multivariate Time Series. - Inkit Padhi; Yair Schiff; Igor Melnyk; Mattia Rigotti; Youssef Mroueh; Pierre L. Dognin; Jerret Ross; Ravi Nair; Erik R. Altman (ICASSP, 2021)

Realistic Synthetic Financial Transactions for Anti-Money Laundering Models. - Erik R. Altman; Jovan Blanusa; Luc von Niederhäusern; Beni Egressy; Andreea Anghel; Kubilay Atasu (NeurIPS, 2023)

Anomaly Detection on IBM Z Mainframes: Performance Analysis and More. - Erik R. Altman; Benjamin Segal (SYSTOR, 2023)

Realistic Synthetic Financial Transactions for Anti-Money Laundering Models. - Erik R. Altman; Béni Egressy; Jovan Blanusa; Kubilay Atasu (CoRR, 2023)

Provably Powerful Graph Neural Networks for Directed Multigraphs. - Béni Egressy; Luc von Niederhäusern; Jovan Blanusa; Erik R. Altman; Roger Wattenhofer; Kubilay Atasu (AAAI, 2024)

Graph Feature Preprocessor: Real-time Subgraph-based Feature Extraction for Financial Crime Detection. - Jovan Blanusa; Maximo Cravero Baraja; Andreea Anghel; Luc von Niederhäusern; Erik R. Altman; Haris Pozidis; Kubilay Atasu (ICAIF, 2024)

Graph Feature Preprocessor: Real-time Extraction of Subgraph-based Features from Transaction Graphs. - Jovan Blanusa; Maximo Cravero Baraja; Andreea Anghel; Luc von Niederhäusern; Erik R. Altman; Haris Pozidis; Kubilay Atasu (CoRR, 2024)