A 1.1V 50mW 2.5GS/s 7b Time-Interleaved C-2C SAR ADC in 45nm LP digital CMOS. - Erkan Alpman; Hasnain Lakdawala; L. Richard Carley; Krishnamurthy Soumyanath (ISSCC, 2009)

32nm x86 OS-compliant PC on-chip with dual-core Atom® processor and RF WiFi transceiver. - Hasnain Lakdawala; Mark Schaecher; Chang-Tsung Fu; Rahul Dilip Limaye; Jon Duster; Yulin Tan; Ajay Balankutty; Erkan Alpman; Chun C. Lee; Satoshi Suzuki; Brent R. Carlton; Hyung Seok Kim; et al. (ISSCC, 2012)

A 2.4GHz WLAN transceiver with fully-integrated highly-linear 1.8V 28.4dBm PA, 34dBm T/R switch, 240MS/s DAC, 320MS/s ADC, and DPLL in 32nm SoC CMOS. - Yulin Tan; Jon Duster; Chang-Tsung Fu; Erkan Alpman; Ajay Balankutty; Chun C. Lee; Ashoke Ravi; Stefano Pellerano; Kailash Chandrashekar; Hyung Seok Kim; Brent R. Carlton; Satoshi Suzuki; et al. (VLSIC, 2012)

A 32 nm SoC With Dual Core ATOM Processor and RF WiFi Transceiver. - Hasnain Lakdawala; Mark Schaecher; Chang-Tsung Fu; Rahul Dilip Limaye; Jon Duster; Yulin Tan; Ajay Balankutty; Erkan Alpman; Chun C. Lee; Khoa Minh Nguyen; Hyung-Jin Lee; Ashoke Ravi; et al. (IEEE J. Solid State Circuits, 2013)

A 1.2 V 2.64 GS/s 8bit 39 mW skew-tolerant time-interleaved SAR ADC in 40 nm digital LP CMOS for 60 GHz WLAN. - Sandipan Kundu; Julia Hsin-Lin Lu; Erkan Alpman; Hasnain Lakdawala; Jeyanandh Paramesh; Byunghoo Jung; Sarit Zur; Eshel Gordon (CICC, 2014)

An 8.5MHz 67.2dB SNDR CTDSM with ELD compensation embedded twin-T SAB and circular TDC-based quantizer in 90nm CMOS. - Chan-Hsiang Weng; Tzu-An Wei; Erkan Alpman; Chang-Tsung Fu; Yi-Ting Tseng; Tsung-Hsien Lin (VLSIC, 2014)

A 13-MHz 68-dB SNDR CTDSM using SAB loop filter and interpolating flash quantizer with random-skip IDWA function in 90-nm CMOS. - Chan-Hsiang Weng; Wei-Hsiang Huang; Erkan Alpman; Tsung-Hsien Lin (A-SSCC, 2015)

A 1.2 V 2.64 GS/s 8 bit 39 mW Skew-Tolerant Time-interleaved SAR ADC in 40 nm Digital LP CMOS for 60 GHz WLAN. - Sandipan Kundu; Erkan Alpman; Julia Hsin-Lin Lu; Hasnain Lakdawala; Jeyanandh Paramesh; Byunghoo Jung; Sarit Zur; Eshel Gordon (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

A Continuous-Time Delta-Sigma Modulator Using ELD-Compensation-Embedded SAB and DWA-Inherent Time-Domain Quantizer. - Chan-Hsiang Weng; Tzu-An Wei; Erkan Alpman; Chang-Tsung Fu; Tsung-Hsien Lin (IEEE J. Solid State Circuits, 2016)

Overview of low-power wake-up radio design insights. - Erkan Alpman (CICC, 2018)

A cm-scale self-powered intelligent and secure IoT edge mote featuring an ultra-low-power SoC in 14nm tri-gate CMOS. - Tanay Karnik; Dileep Kurian; Paolo A. Aseron; Richard Dorrance; Erkan Alpman; Angela Nicoara; Roman Popov; Leonid Azarenkov; Mikhail J. Moiseev; Li Zhao 002; Santosh Ghosh; Rafael Misoczki; et al. (ISSCC, 2018)

A Dual-Mode Configurable RF-to-Digital Receiver in 16NM FinFET. - Amy Whitcombe; Borivoje Nikolic; Farhana Sheikh; Erkan Alpman; Ashoke Ravi (VLSI Circuits, 2018)

802.11g/n Compliant Fully Integrated Wake-Up Receiver With -72-dBm Sensitivity in 14-nm FinFET CMOS. - Erkan Alpman; Ahmad Khairi; Richard Dorrance; Minyoung Park; V. Srinivasa Somayazulu; Jeffrey R. Foerster; Ashoke Ravi; Jeyanandh Paramesh; Stefano Pellerano (IEEE J. Solid State Circuits, 2018)