DyAFNoC: Characterization and analysis of a dynamically reconfigurable NoC using a DOR-based deadlock-free routing algorithm. - Ernesto Villegas Castillo; Gabriele Miorandi; Jiang Chau Wang (NOCS, 2014)

DyAFNoC: Dynamically Reconfigurable NoC Characterization Using a Simple Adaptive Deadlock-Free Routing Algorithm with a Low Implementation Cost. - Ernesto Villegas Castillo; Gabriele Miorandi; Davide Bertozzi; Jiang Chau Wang (ARC, 2015)

Dynamically Reconfigurable NoC using a deadlock-free flexible routing algorithm with a low hardware implementation cost. - Ernesto Villegas Castillo; Jiang Chau Wang; Gabriele Miorandi; Davide Bertozzi (LASCAS, 2015)

A highly parallel 4K real-time HEVC fractional motion estimation architecture for FPGA implementation. - Jorge Soto Leon; Carlos Silva Cárdenas; Ernesto Cristopher Villegas Castillo (ICECS, 2016)

A Dependency-Free Real-Time UHD Architecture for the Initial Stage of HEVC Motion Estimation. - Haris Chaudhry; Mario Raffo-Jara; Carlos Silva Cárdenas; Ernesto Cristopher Villegas Castillo (LASCAS, 2019)

Evaluating the Hardware Performance Counters of an Xtensa Virtual Prototype. - Adebayo Omotosho; Sirine Ilahi; Ernesto Cristopher Villegas Castillo; Christian Hammer 001; Christian Sauer 001 (DDECS, 2023)

An Efficient Approach for STLs Development of Automotive SoCs Using Colored Petri Nets. - Ernesto Cristopher Villegas Castillo; Felipe Augusto da Silva; Michael Glaß (DDECS, 2024)

Diagnostic Coverage Estimation for Automotive SoCs Based on Colored Stochastic Petri Nets. - Ernesto Cristopher Villegas Castillo; Felipe Augusto da Silva; Michael Glaß (VLSI-SoC, 2024)