Matching Detection and Correction Schemes for Soft Error Handling in Sequential Logic. - Erol Koser; Felix Miller; Walter Stechele (DSD, 2015)

A Chip-level Redundant Threading (CRT) scheme for shared-memory protection. - Erol Koser; Korbinian Berthold; Ravi Kumar Pujari; Walter Stechele (HPCS, 2016)

Tackling long duration transients in sequential logic. - Erol Koser; Walter Stechele (IOLTS, 2016)

Integrated Soft Error Resilience and Self-Test. - Erol Koser; Sebastian Krosche; Walter Stechele (VLSI-SoC, 2016)