Accelerating the Development of NTRU Algorithm on Embedded Systems. - Eros Camacho-Ruiz; Macarena C. Martínez-Rodríguez; Santiago Sánchez-Solano; Piedad Brox (DCIS, 2020)

Design Flow to Evaluate the Performance of Ring Oscillator PUFs on FPGAs. - Macarena C. Martínez-Rodríguez; Eros Camacho-Ruiz; Santiago Sánchez-Solano; Piedad Brox (DCIS, 2021)

Timing-Optimized Hardware Implementation to Accelerate Polynomial Multiplication in the NTRU Algorithm. - Eros Camacho-Ruiz; Santiago Sánchez-Solano; Piedad Brox; Macarena C. Martínez-Rodríguez (ACM J. Emerg. Technol. Comput. Syst., 2021)

A novel Physical Unclonable Function using RTN. - Eros Camacho-Ruiz; Rafael Castro-López; Elisenda Roca; Piedad Brox; Francisco V. Fernández 001 (ISCAS, 2022)

High-level design of a novel PUF based on RTN. - Eros Camacho-Ruiz; Rafael Castro-López; Elisenda Roca; Francisco V. Fernández 001 (SMACD, 2022)

On the use of an RTN simulator to explore the quality trade-offs of a novel RTN-based PUF. - Eros Camacho-Ruiz; Andrés Santana-Andreo; Rafael Castro-López; Elisenda Roca; Francisco V. Fernández 001 (SMACD, 2022)

Efficient RO-PUF for Generation of Identifiers and Keys in Resource-Constrained Embedded Systems. - Macarena C. Martínez-Rodríguez; Luis F. Rojas-Muñoz; Eros Camacho-Ruiz; Santiago Sánchez-Solano; Piedad Brox (Cryptogr., 2022)

Multi-Unit Serial Polynomial Multiplier to Accelerate NTRU-Based Cryptographic Schemes in IoT Embedded Systems. - Santiago Sánchez-Solano; Eros Camacho-Ruiz; Macarena C. Martínez-Rodríguez; Piedad Brox (Sensors, 2022)

A Simple Power Analysis of an FPGA implementation of a polynomial multiplier for the NTRU cryptosystem. - Eros Camacho-Ruiz; Santiago Sánchez-Solano; Macarena C. Martínez-Rodríguez; Erica Tena-Sánchez; Piedad Brox (DCIS, 2023)

A complete SHA-3 hardware library based on a high efficiency Keccak design. - Eros Camacho-Ruiz; Santiago Sánchez-Solano; Macarena C. Martínez-Rodríguez; Piedad Brox (NorCAS, 2023)

Design considerations for a CMOS 65-nm RTN-based PUF. - Eros Camacho-Ruiz; F. J. Rubio-Barbero; Rafael Castro-López; Elisenda Roca; Francisco V. Fernández 001 (SMACD, 2023)

A Peak Detect & Hold circuit to measure and exploit RTN in a 65-nm CMOS PUF. - F. J. Rubio-Barbero; Eros Camacho-Ruiz; Rafael Castro-López; Elisenda Roca; Francisco V. Fernández 001 (SMACD, 2023)

Timing-Attack-Resistant Acceleration of NTRU Round 3 Encryption on Resource-Constrained Embedded Systems. - Eros Camacho-Ruiz; Macarena C. Martínez-Rodríguez; Santiago Sánchez-Solano; Piedad Brox (Cryptogr., 2023)

Cryptographic Security Through a Hardware Root of Trust. - Luis F. Rojas-Muñoz; Santiago Sánchez-Solano; Macarena C. Martínez-Rodríguez; Eros Camacho-Ruiz; Pablo Navarro-Torrero; Apurba Karmakar; Carlos Fernández García; Erica Tena-Sánchez; Francisco Eugenio Potestad-Ordóñez; Alejandro Casado-Galán; Pau Ortega-Castro; Antonio Acosta-Jiménez; et al. (ARC, 2024)

Design of a Karatsuba Multiplier to Accelerate Digital Signature Schemes on Embedded Systems. - Pablo Navarro-Torrero; Eros Camacho-Ruiz; Macarena C. Martínez-Rodríguez; Piedad Brox (NorCAS, 2024)

A Side-Channel Protected and High-Performance Hardware Implementation for EdDSA25519. - Pablo Navarro-Torrero; Eros Camacho-Ruiz; Macarena C. Martínez-Rodríguez; Piedad Brox Jiménez (IEEE Access, 2025)