Analytical study of complementary memristive synchronous logic gates. - Jean-Michel Portal; Mathieu Moreau; Marc Bocquet; Hassen Aziza; Damien Deleruyelle; Christophe Muller; Yue Zhang 010; Erya Deng; Jacques-Olivier Klein; Damien Querlioz; Dafine Ravelosona; Claude Chappert; et al. (NANOARCH, 2013)

Synchronous full-adder based on complementary resistive switching memory cells. - Yue Zhang 010; Erya Deng; Jacques-Olivier Klein; Damien Querlioz; Dafine Ravelosona; Claude Chappert; Weisheng Zhao; Mathieu Moreau; Jean-Michel Portal; Marc Bocquet; Hassen Aziza; Damien Deleruyelle; et al. (NEWCAS, 2013)

Compact model of magnetic tunnel junction with stochastic spin transfer torque switching for reliability analyses. - You Wang 002; Yue Zhang 010; Erya Deng; Jacques-Olivier Klein; Lirida A. B. Naviner; Weisheng Zhao (Microelectron. Reliab., 2014)

Ultra Low Power Magnetic Flip-Flop Based on Checkpointing/Power Gating and Self-Enable Mechanisms. - Djaafar Chabi; Weisheng Zhao; Erya Deng; Yue Zhang 010; Nesrine Ben Romdhane; Jacques-Olivier Klein; Claude Chappert (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

Synchronous Non-Volatile Logic Gate Design Based on Resistive Switching Memories. - Weisheng Zhao; Mathieu Moreau; Erya Deng; Yue Zhang 010; Jean-Michel Portal; Jacques-Olivier Klein; Marc Bocquet; Hassen Aziza; Damien Deleruyelle; Christophe Muller; Damien Querlioz; Nesrine Ben Romdhane; et al. (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

Robust magnetic full-adder with voltage sensing 2T/2MTJ cell. - Erya Deng; You Wang 002; Zhaohao Wang; Jacques-Olivier Klein; Bernard Dieny; Guillaume Prenat; Weisheng Zhao (NANOARCH, 2015)

Synchronous 8-bit Non-Volatile Full-Adder based on Spin Transfer Torque Magnetic Tunnel Junction. - Erya Deng; Yue Zhang 010; Wang Kang 001; Bernard Dieny; Jacques-Olivier Klein; Guillaume Prenat; Weisheng Zhao (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

Multi-context non-volatile content addressable memory using magnetic tunnel junctions. - Erya Deng; Lorena Anghel; Guillaume Prenat; Weisheng Zhao (NANOARCH, 2016)

High-Density and Fast-Configuration Non-Volatile Look-Up Table Based on NAND-Like Spintronic Memory. - He Zhang 011; Wang Kang 001; Zhaohao Wang; Erya Deng; Youguang Zhang; Weisheng Zhao (APCCAS, 2018)

Multi-bit nonvolatile flip-flop based on NAND-like spin transfer torque MRAM. - Erya Deng; Zhaohao Wang; Wang Kang 001; Shaoqian Wei; Weisheng Zhao (VLSI-SoC, 2018)

A high-reliability and low-power computing-in-memory implementation within STT-MRAM. - Liuyang Zhang; Erya Deng; Hao Cai 001; You Wang 002; Lionel Torres; Aida Todri-Sanial; Youguang Zhang (Microelectron. J., 2018)

A Novel MTJ-Based Non-Volatile Ternary Content-Addressable Memory for High-Speed, Low-Power, and High-Reliable Search Operation. - Chengzhi Wang; Deming Zhang; Lang Zeng; Erya Deng; Jie Chen 009; Weisheng Zhao (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

A Reconfigurable Arbiter PUF Based on STT-MRAM. - Rashid Ali; You Wang 002; Haoyuan Ma; Zhengyi Hou; Deming Zhang; Erya Deng; Weisheng Zhao (ISCAS, 2021)

Spin-Orbit Torque Nonvolatile Flip-Flop Designs. - Erya Deng; Wang Kang 001; Weisheng Zhao; Shaoqian Wei; You Wang 002; Deming Zhang (ISCAS, 2021)

HSC: A Hybrid Spin/CMOS Logic Based In-Memory Engine with Area-Efficient Mapping Strategy. - Yan Huang; Erya Deng; Jinyu Bai; Qing Yang; Wang Kang 001; Biao Pan (ISCAS, 2021)

SpinSim: A Computer Architecture-Level Variation Aware STT-MRAM Performance Evaluation Framework. - Haoyuan Ma; You Wang 002; Rashid Ali; Zhengyi Hou; Deming Zhang; Erya Deng; Gefei Wang; Weisheng Zhao (ISCAS, 2021)

Fully Single Event Double Node Upset Tolerant Design for Magnetic Random Access Memory. - Deming Zhang; Xian Wang; Kaili Zhang; Lang Zeng; You Wang 002; Bi Wang; Erya Deng; Chuanjie Wang; Peng Wu; Youguang Zhang; Weisheng Zhao (ISCAS, 2021)

A Novel Multi-Context Non-Volatile Content-Addressable Memory Cell and Multi-Level Architecture for High Reliability and Density. - Xian Wang; Deming Zhang; Kaili Zhang; Erya Deng; You Wang 002; Weisheng Zhao (NVMSA, 2021)

A Spintronic In-Memory Computing Network for Efficient Hamming Codec Implementation. - Linjun Jiang; Erya Deng; He Zhang 011; Zhaohao Wang; Wang Kang 001; Weisheng Zhao (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

CiTST-AdderNets: Computing in Toggle Spin Torques MRAM for Energy-Efficient AdderNets. - Lichuan Luo; Erya Deng; Dijun Liu; Zhen Wang; Weiliang Huang; He Zhang 011; Xiao Liu; Jinyu Bai; Junzhan Liu; Youguang Zhang; Wang Kang 001 (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

Exploring Teaching Methods for Courses on Radiation Hardening Technology in ICs. - You Wang 002; Erya Deng; Yu Gong; Zhongkun Shen; Chenghua Wang; Yijun Cui; Weiqiang Liu 001 (ISCAS, 2025)

A High-Performance In-Memory Multi-Bit Adder Based on TST-MRAM. - Erya Deng; Zhongkun Shen; Yu Gong; Weiqiang Liu 001 (ISCAS, 2025)

Radiation-Hardened Design of TCAM for Single-Event Upset Tolerance. - Jiaqi You; Erya Deng; Zhongkun Shen; You Wang 002; Weiqiang Liu 001 (ISCAS, 2025)

A Dual-Swing-Sample-and-Couple Sense Amplifier With Large Sensing Margin for STT-MRAM. - You Wang 002; Da Song; Jiaao Dai; Erya Deng; Yu Gong; Weiqiang Liu 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2025)