A Novel Ternary Multiplier Based on Ternary CMOS Compact Model. - Yesung Kang; Jaewoo Kim; Sunmin Kim; Sunhae Shin; E-San Jang; Jae Won Jeong; Kyung Rok Kim; Seokhyeong Kang (ISMVL, 2017)

CMOS-Compatible Ternary Device Platform for Physical Synthesis of Multi-valued Logic Circuits. - Sunhae Shin; Esan Jang; Jae Won Jeong; Kyung Rok Kim (ISMVL, 2017)

Record-High Performance Trantenna Based On Asymmetric Nano-Ring Fet For Polarization-Independent Large-Scale/Real-Time Thz Imaging. - E-San Jang; Min-Woo Ryu; R. Patel; S. H. Ahn; H. J. Jeon; K. J. Han; K. R. Kim (VLSI Circuits, 2019)