Exploiting rotational symmetries for improved stacked yields in W2W 3D-SICs. - Eshan Singh (VTS, 2011)

Impact of Radial defect clustering on 3D stacked IC yield from wafer to wafer stacking. - Eshan Singh (ITC, 2012)

Analytical Modeling of 3D Stacked IC Yield from Wafer to Wafer Stacking with Radial Defect Clustering. - Eshan Singh (VLSID, 2014)

Modeling location based wafer die yield variation in estimating 3D stacked IC yield from wafer to wafer stacking. - Eshan Singh (VTS, 2014)

A structured approach to post-silicon validation and debug using symbolic quick error detection. - David Lin; Eshan Singh; Clark W. Barrett; Subhasish Mitra (ITC, 2015)

Symbolic Quick Error Detection for Pre-Silicon and Post-Silicon Validation: Frequently Asked Questions. - Eshan Singh; David Lin; Clark W. Barrett; Subhasish Mitra (IEEE Des. Test, 2016)

E-QED: Electrical Bug Localization During Post-silicon Validation Enabled by Quick Error Detection and Formal Methods. - Eshan Singh; Clark W. Barrett; Subhasish Mitra (CAV (2), 2017)

Logic Bug Detection and Localization Using Symbolic Quick Error Detection. - Eshan Singh; David Lin; Clark W. Barrett; Subhasish Mitra (CoRR, 2017)

Symbolic QED Pre-silicon Verification for Automotive Microcontroller Cores: Industrial Case Study. - Eshan Singh; Keerthikumara Devarajegowda; Sebastian Simon; Ralf Schnieder; Karthik Ganesan 001; Mohammad Rahmani Fadiheh; Dominik Stoffel; Wolfgang Kunz; Clark W. Barrett; Wolfgang Ecker; Subhasish Mitra (DATE, 2019)

Unlocking the Power of Formal Hardware Verification with CoSA and Symbolic QED: Invited Paper. - Florian Lonsing; Karthik Ganesan 001; Makai Mann; Srinivasa Shashank Nuthakki; Eshan Singh; Mario Srouji; Yahan Yang; Subhasish Mitra; Clark W. Barrett (ICCAD, 2019)

A-QED Verification of Hardware Accelerators. - Eshan Singh; Florian Lonsing; Saranyu Chattopadhyay; Maxwell Strange; Peng Wei 004; Xiaofan Zhang 001; Yuan Zhou; Deming Chen; Jason Cong; Priyanka Raina; Zhiru Zhang; Clark W. Barrett; et al. (DAC, 2020)

Gap-free Processor Verification by S2QED and Property Generation. - Keerthikumara Devarajegowda; Mohammad Rahmani Fadiheh; Eshan Singh; Clark W. Barrett; Subhasish Mitra; Wolfgang Ecker; Dominik Stoffel; Wolfgang Kunz (DATE, 2020)

Effective Pre-Silicon Verification of Processor Cores by Breaking the Bounds of Symbolic Quick Error Detection. - Karthik Ganesan 001; Florian Lonsing; Srinivasa Shashank Nuthakki; Eshan Singh; Mohammad Rahmani Fadiheh; Wolfgang Kunz; Dominik Stoffel; Clark W. Barrett; Subhasish Mitra (CoRR, 2021)

LFPS: Learned Formal Proof Strengthening for Efficient Hardware Verification. - Minwoo Kang; Azade Nova; Eshan Singh; Geetheeka Sharron Bathini; Yuriy Viktorov (ICCAD, 2023)

Pause-Tuning for Long-Context Comprehension: A Lightweight Approach to LLM Attention Recalibration. - James Begin; Namit Agrawal; Eshan Singh; Yicheng Fu; Sean O'Brien; Vasu Sharma; Kevin Zhu (CoRR, 2025)