A Complete Multi-Processor System-on-Chip FPGA-Based Emulation Framework. - Pablo García Del Valle; David Atienza; Ivan Magan; Javier Garcia Flores; Esther Andres Perez; Jose Manuel Mendias; Luca Benini; Giovanni De Micheli (VLSI-SoC, 2006)

Restricted Chaining and Fragmentation Techniques in Power Aware High Level Synthesis. - Alberto A. Del Barrio; María C. Molina; Jose Manuel Mendias; Esther Andres Perez; Román Hermida (DSD, 2008)

Applying speculation techniques to implement functional units. - Alberto A. Del Barrio; María C. Molina; Jose Manuel Mendias; Esther Andres Perez; Román Hermida; Francisco Tirado (ICCD, 2008)