Bioinspired Programming of Resistive Memory Devices for Implementing Spiking Neural Networks. - Elisa Vianello; Thilo Werner; Alessandro Grossi; Etienne Nowak; Barbara De Salvo; Luca Perniola; Olivier Bichler; Blaise Yvert (ACM Great Lakes Symposium on VLSI, 2017)

High speed and high-area efficiency non-volatile look-up table design based on magnetic tunnel junction. - Rana Alhalabi; Gregory di Pendina; Ioan Lucian Prejbeanu; Etienne Nowak (NVMTS, 2017)

MRAM: from STT to SOT, for security and memory. - Mounia Kharbouche-Harrari; Rana Alhalabi; Jérémy Postel-Pellerin; Romain Wacquez; Driss Aboulkassimi; Etienne Nowak; Ioan Lucian Prejbeanu; Guillaume Prenat; Gregory di Pendina (DCIS, 2018)

Metal Oxide Resistive Memory (OxRAM) and Phase Change Memory (PCM) as Artificial Synapses in Spiking Neural Networks. - Elisa Vianello; Denys R. B. Ly; Selina La Barbera; Thomas Dalgaty; Niccolo Castellani; Gabriele Navarro; Guillaume Bourgeois; Alexandre Valentian; Etienne Nowak; Damien Querlioz (ICECS, 2018)

OTS selector devices: Material engineering for switching performance. - Marie Claire Cyrille; Anthonin Verdy; Gabriele Navarro; Guillaume Bourgeois; Julien Garrione; Mathieu Bernard; C. Sabbione; Pierre Noe; Etienne Nowak (ICICDT, 2018)

Sub-pJ consumption and short latency time in RRAM arrays for high endurance applications. - Gilbert Sassine; Cecile Nail; Luc Tillie; Diego Alfaro Robayo; Alexandre Levisse; Carlo Cagli; Khalil El Hajjam; Jean-Francois Nodin; Elisa Vianello; Mathieu Bernard; Gabriel Molas; Etienne Nowak (IRPS, 2018)

Carbon electrode for Ge-Se-Sb based OTS selector for ultra low leakage current and outstanding endurance. - Anthonin Verdy; Gabriele Navarro; Mathieu Bernard; Sophie Chevalliez; Niccolo Castellani; Emmanuel Nolot; Julien Garrione; Pierre Noe; Guillaume Bourgeois; Veronique Sousa; Marie Claire Cyrille; Etienne Nowak (IRPS, 2018)

Role of synaptic variability in spike-based neuromorphic circuits with unsupervised learning. - Denys R. B. Ly; Alessandro Grossi; Thilo Werner; Thomas Dalgaty; Claire Fenouillet-Béranger; Elisa Vianello; Etienne Nowak (ISCAS, 2018)

Insect-Inspired Elementary Motion Detection Embracing Resistive Memory and Spiking Neural Networks. - Thomas Dalgaty; Elisa Vianello; Denys Ly; Giacomo Indiveri; Barbara De Salvo; Etienne Nowak; Jerome Casas (Living Machines, 2018)

High density SOT-MRAM memory array based on a single transistor. - Rana Alhalabi; Etienne Nowak; Ioan Lucian Prejbeanu; Gregory di Pendina (NVMTS, 2018)

Experimental Investigation of 4-kb RRAM Arrays Programming Conditions Suitable for TCAM. - Alessandro Grossi; Elisa Vianello; Cristian Zambelli; Pablo Royer; Jean-Philippe Noel; Bastien Giraud; Luca Perniola; Piero Olivo; Etienne Nowak (IEEE Trans. Very Large Scale Integr. Syst., 2018)

Outstanding Bit Error Tolerance of Resistive RAM-Based Binarized Neural Networks. - Tifenn Hirtzlin; Marc Bocquet; Jacques-Olivier Klein; Etienne Nowak; Elisa Vianello; Jean-Michel Portal; Damien Querlioz (AICAS, 2019)

Memory-Centric Neuromorphic Computing With Nanodevices. - Damien Querlioz; Julie Grollier; Tifenn Hirtzlin; Jacques-Olivier Klein; Etienne Nowak; Elisa Vianello; Marc Bocquet; Jean-Michel Portal; Miguel Romera; Philippe Talatchian (BioCAS, 2019)

Hybrid CMOS-RRAM Neurons with Intrinsic Plasticity. - Thomas Dalgaty; Melika Payvand; Barbara De Salvo; Jerome Casas; Giusy Lama; Etienne Nowak; Giacomo Indiveri; Elisa Vianello (ISCAS, 2019)

A 43pJ/Cycle Non-Volatile Microcontroller with 4.7μs Shutdown/Wake-up Integrating 2.3-bit/Cell Resistive RAM and Resilience Techniques. - Tony F. Wu; Binh Q. Le; Robert M. Radway; Andrew Bartolo; William Hwang; Seungbin Jeong; Haitong Li; Pulkit Tandon; Elisa Vianello; Pascal Vivet; Etienne Nowak; Mary Wootters; et al. (ISSCC, 2019)

Liquid Silicon: A Nonvolatile Fully Programmable Processing-In-Memory Processor with Monolithically Integrated ReRAM for Big Data/Machine Learning Applications. - Yue Zha; Etienne Nowak; Jing Li 073 (VLSI Circuits, 2019)

In-Memory and Error-Immune Differential RRAM Implementation of Binarized Deep Neural Networks. - Marc Bocquet; Tifenn Hirtzlin; Jacques-Olivier Klein; Etienne Nowak; Elisa Vianello; Jean-Michel Portal; Damien Querlioz (CoRR, 2019)

Digital Biologically Plausible Implementation of Binarized Neural Networks with Differential Hafnium Oxide Resistive Memory Arrays. - Tifenn Hirtzlin; Marc Bocquet; Bogdan Penkovsky; Jacques-Olivier Klein; Etienne Nowak; Elisa Vianello; Jean-Michel Portal; Damien Querlioz (CoRR, 2019)

Switching Event Detection and Self-Termination Programming Circuit for Energy Efficient ReRAM Memory Arrays. - Mouhamad Alayan; Eloi Muhr; Alexandre Levisse; Marc Bocquet; Mathieu Moreau; Etienne Nowak; Gabriel Molas; Elisa Vianello; Jean-Michel Portal (IEEE Trans. Circuits Syst. II Express Briefs, 2019)

Low Power In-Memory Implementation of Ternary Neural Networks with Resistive RAM-Based Synapse. - Axel Laborieux; Marc Bocquet; Tifenn Hirtzlin; Jacques-Olivier Klein; Liza Herrera Diez; Etienne Nowak; Elisa Vianello; Jean-Michel Portal; Damien Querlioz (AICAS, 2020)

In-Memory Resistive RAM Implementation of Binarized Neural Networks for Medical Applications. - Bogdan Penkovsky; Marc Bocquet; Tifenn Hirtzlin; Jacques-Olivier Klein; Etienne Nowak; Elisa Vianello; Jean-Michel Portal; Damien Querlioz (DATE, 2020)

Embracing the Unreliability of Memory Devices for Neuromorphic Computing. - Marc Bocquet; Tifenn Hirtzlin; Jacques-Olivier Klein; Etienne Nowak; Elisa Vianello; Jean-Michel Portal; Damien Querlioz (IRPS, 2020)

Write Termination Circuits for RRAM: A Holistic Approach From Technology to Application Considerations. - Alexandre Levisse; Marc Bocquet; Marco Rios; Mouhamad Alayan; Mathieu Moreau; Etienne Nowak; Gabriel Molas; Elisa Vianello; David Atienza; Jean-Michel Portal (IEEE Access, 2020)

Liquid Silicon: A Nonvolatile Fully Programmable Processing-in-Memory Processor With Monolithically Integrated ReRAM. - Yue Zha; Etienne Nowak; Jing Li 073 (IEEE J. Solid State Circuits, 2020)

16kbit 1T1R OxRAM arrays embedded in 28nm FDSOI technology demonstrating low BER, high endurance, and compatibility with core logic transistors. - Laurent Grenouillet; Niccolo Castellani; Alain Persico; Valentina Meli; Simon Martin 006; Olivier Billoint; R. Segaud; Stefania Bernasconi; C. Pellissier; Carine Jahan; Christelle Charpin-Nicolle; P. Dezest; et al. (IMW, 2021)

Multilayer OTS Selectors Engineering for High Temperature Stability, Scalability and High Endurance. - Camille Laguna; Mathieu Bernard; Nicolas Bernier; D. Rouchon; N. Rochat; Julien Garrione; A. Jannaud; Emmanuel Nolot; Valentina Meli; Niccolo Castellani; C. Sabbione; Guillaume Bourgeois; et al. (IMW, 2021)

Ge-Se-Sb-N-based OTS scaling perspectives for high-density 1 S1R crossbar arrays. - Joel Minguet Lopez; Niccolo Castellani; Laurent Grenouillet; Lucas Reganaz; Gabriele Navarro; Mathieu Bernard; Catherine Carabasse; Thomas Magis; Damien Deleruyelle; Marc Bocquet; Jean-Michel Portal; Etienne Nowak; et al. (IMW, 2021)

Multilevel Programming Reliability in Si-doped GeSbTe for Storage Class Memory. - Giusy Lama; Mathieu Bernard; Nicolas Bernier; Guillaume Bourgeois; Emmanuel Nolot; Niccolo Castellani; Julien Garrione; Marie Claire Cyrille; Gabriele Navarro; Etienne Nowak (IRPS, 2021)

Elucidating 1S1R operation to reduce the read voltage margin variability by stack and programming conditions optimization. - Joel Minguet Lopez; Lucas Hudeley; Laurent Grenouillet; Diego Alfaro Robayo; Jury Sandrini; Gabriele Navarro; Mathieu Bernard; Catherine Carabasse; Damien Deleruyelle; Niccolo Castellani; Marc Bocquet; Jean-Michel Portal; et al. (IRPS, 2021)

Model of the Weak Reset Process in HfOx Resistive Memory for Deep Learning Frameworks. - Atreya Majumdar; Marc Bocquet; Tifenn Hirtzlin; Axel Laborieux; Jacques-Olivier Klein; Etienne Nowak; Elisa Vianello; Jean-Michel Portal; Damien Querlioz (CoRR, 2021)

Implementation of Ternary Weights With Resistive RAM Using a Single Sense Operation Per Synapse. - Axel Laborieux; Marc Bocquet; Tifenn Hirtzlin; Jacques-Olivier Klein; Etienne Nowak; Elisa Vianello; Jean-Michel Portal; Damien Querlioz (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

Specificities of linear Si QD arrays integration and characterization. - Heimanu Niebojewski; Benoit Bertrand; Etienne Nowak; Thomas Bedecarrats; Bruna Cardoso Paz; Lauriane Contamin; Pierre-André Mortemousque; V. Labracherie; L. Brevard; H. Sahin; Jean Charbonnier; C. Thomas; et al. (VLSI Technology and Circuits, 2022)

Reliability of GaN MOSc-HEMTs: From TDDB to Threshold Voltage Instabilities (Invited). - William Vandendaele; Camille Leurquin; R. Lavieville; Marie-Anne Jaud; Abygaël Viey; Romain Gwoziecki; B. Mohamad; Etienne Nowak; Aurore Constant; Ferdinando Iucolano (IRPS, 2023)