Integrated, variable-reluctance magnetic minimotor. - Eugene J. O'Sullivan; Emanuel I. Cooper; Lubomyr T. Romankiw; Keith T. Kwietniak; Philip Louis Trouilloud; Jean Horkans; Christopher V. Jahnes; Inna V. Babich; Sol Krongelb; Suryanarayan G. Hegde; James A. Tornello; Nancy C. LaBianca; et al. (IBM J. Res. Dev., 1998)

Electrolessly deposited diffusion barriers for microelectronics. - Eugene J. O'Sullivan; Alejandro G. Schrott; Milan Paunovic; Carlos J. Sambucetti; Jeffrey R. Marino; Philip J. Bailey; Suryanarayana Kaja; Krystyna W. Semkow (IBM J. Res. Dev., 1998)

Two-level BEOL processing for rapid iteration in MRAM development. - Michael C. Gaidis; Eugene J. O'Sullivan; Janusz Jozef Nowak; Yu Lu; Sivananda K. Kanakasabapathy; Philip Louis Trouilloud; Daniel Christopher Worledge; Solomon Assefa; Keith R. Milkove; George P. Wright; William J. Gallagher (IBM J. Res. Dev., 2006)

A 2.5D integrated voltage regulator using coupled-magnetic-core inductors on silicon interposer delivering 10.8A/mm2. - Noah Sturcken; Eugene J. O'Sullivan; Naigang Wang; Philipp Herget; Bucknell C. Webb; Lubomyr T. Romankiw; Michele Petracca; Ryan Davies; Robert E. Fontana Jr.; Gary M. Decad; Ioannis Kymissis; Angel V. Peterchev; et al. (ISSCC, 2012)

A 2.5D Integrated Voltage Regulator Using Coupled-Magnetic-Core Inductors on Silicon Interposer. - Noah Sturcken; Eugene J. O'Sullivan; Naigang Wang; Philipp Herget; Bucknell C. Webb; Lubomyr T. Romankiw; Michele Petracca; Ryan Davies; Robert E. Fontana Jr.; Gary M. Decad; Ioannis Kymissis; Angel V. Peterchev; et al. (IEEE J. Solid State Circuits, 2013)

An 82%-efficient multiphase voltage-regulator 3D interposer with on-chip magnetic inductors. - Kevin Tien; Noah Sturcken; Naigang Wang; Jae-Woong Nah; Bing Dang; Eugene J. O'Sullivan; Paul S. Andry; Michele Petracca; Luca P. Carloni; William J. Gallagher; Kenneth L. Shepard (VLSIC, 2015)

Low-current Spin Transfer Torque MRAM. - Guohan Hu; J. J. Nowak; G. Lauer; J. H. Lee; J. Z. Sun; J. Harms; Anthony J. Annunziata; S. Brown; W. Chen; Y. H. Kim; N. Marchack; Sunil Murthy; et al. (VLSI-DAT, 2017)