ESP, a structure synthesis program. - E. Randon; P. Sanchez; Eugenio Villar (Microprocess. Microprogramming, 1992)

Future direction of synthesizability and interoperability of HDL's: part 1. - Masaharu Imai; Eugenio Villar (ASP-DAC, 1995)

Future direction of synthesizabilty and interoperability of HDL's: part 2. - Eugenio Villar; Masaharu Imai (ASP-DAC, 1995)

ASPDAC 1995: HDL synthesizability and interoperability. - Masaharu Imai; Eugenio Villar (IEEE Des. Test Comput., 1996)

VHDL synthesis description portability: The need for Level synthesis subsets. - Manfred Selz; Wolfgang Ecker; Eugenio Villar (J. Syst. Archit., 1996)

An algorithm for clock cycle selection in behavioral synthesis. - Pedro Tabuenca; Pablo Sánchez; Eugenio Villar (J. Syst. Archit., 1998)

Hardware/Software Embedded System Specifiaction and Design Using Ada and VHDL. - Adrian López; Maite Veiga; Eugenio Villar (Ada-Europe, 1999)

System Specification Experiments on a Common Benchmark. - Giulio Gorla; Eduard Moser; Wolfgang Nebel; Eugenio Villar (IEEE Des. Test Comput., 2000)

C/C++: progress or deadlock in system-level specification. - Daniel Gajski; Eugenio Villar; Wolfgang Rosenstiel; Vassilios Gerousis; D. Barton; Jonas Plantin; S. E. Ericsson; Patrizia Cavalloro; Gjalt G. de Jong (DATE, 2001)

Systematic Embedded Software Generation from Systemc. - Fernando Herrera; Héctor Posadas; Pablo Sánchez; Eugenio Villar (Embedded Software for SoC, 2003)

Systemic Embedded Software Generation from SystemC. - Fernando Herrera; Hector Posadas; Pablo Sánchez; Eugenio Villar (DATE, 2003)

Modeling of CSP, KPN and SR Systems with SystemC. - Fernando Herrera; Pablo Sánchez; Eugenio Villar (FDL, 2003)

System-Level Performance Analysis in SystemC. - Hector Posadas; Fernando Herrera; Pablo Sánchez; Eugenio Villar; Francisco Blasco (DATE, 2004)

Heterogeneous System-Level Specification in SystemC. - Fernando Herrera; Pablo Sánchez; Eugenio Villar (FDL, 2004)

Single Source Design Environment for Embedded Systems Based on SystemC. - Hector Posadas; Fernando Herrera; Víctor Fernández 001; Pablo Sánchez; Eugenio Villar; Francisco Blasco (Des. Autom. Embed. Syst., 2004)

Mixing Synchronous Reactive and Untimed Models of Computation. - Fernando Herrera; Eugenio Villar (FDL, 2005)

RTOS modeling in SystemC for real-time embedded SW simulation: A POSIX model. - Hector Posadas; Jesús Ádamez; Eugenio Villar; Francisco Blasco; F. Escuder (Des. Autom. Embed. Syst., 2005)

POSIX modeling in SystemC. - Hector Posadas; Jesús Ádamez; Pablo Sánchez; Eugenio Villar; Francisco Blasco (ASP-DAC, 2006)

A framework for embedded system specification under different models of computation in SystemC. - Fernando Herrera; Eugenio Villar (DAC, 2006)

Extension of the SystemC Kernel for Simulation Coverage. - Fernando Herrera; Eugenio Villar (FDL, 2006)

A general approach to the interoperability of HetSC and SystemC-AMS. - Fernando Herrera; Eugenio Villar; Christoph Grimm 001; Markus Damm; Jan Haase 001 (FDL, 2007)

Protocol Bus Modeling using inheritance with TLM2.0. - Hector Posadas; David Quijano; Eugenio Villar; Marcos Martínez (FDL, 2007)

The ANDRES Project: Analysis and Design of Run-Time Reconfigurable, Heterogeneous Systems. - Andreas Herrholz; Frank Oppenheimer; Philipp A. Hartmann; Andreas Schallenberg; Wolfgang Nebel; Christoph Grimm 001; Markus Damm; Jan Haase 001; Florian Brame; Fernando Herrera; Eugenio Villar; Ingo Sander; et al. (FPL, 2007)

Specification for SystemC-AADL interoperability. - Eduardo de las Heras; Eugenio Villar (WISES, 2007)

A framework for heterogeneous specification and design of electronic embedded systems in SystemC. - Fernando Herrera; Eugenio Villar (ACM Trans. Design Autom. Electr. Syst., 2007)

Heterogeneous System-level Specification Using SystemC. - Eugenio Villar; Axel Jantsch; Christoph Grimm 001; Tim Kogel (DATE, 2008)

Specification of Adaptive HW/SW Systems in SystemC. - Fernando Herrera; Eugenio Villar; Philipp A. Hartmann (FDL, 2008)

Bridging MoCs in SystemC Specifications of Heterogeneous Systems. - Markus Damm; Jan Haase 001; Christoph Grimm 001; Fernando Herrera; Eugenio Villar (EURASIP J. Embed. Syst., 2008)

C-Based Design of Heterogeneous Embedded Systems. - Christoph Grimm 001; Axel Jantsch; Sandeep Kumar Shukla; Eugenio Villar (EURASIP J. Embed. Syst., 2008)

Local application of simulation directed for Exhaustive Coverage of Schedulings of SystemC specifications. - Fernando Herrera; Eugenio Villar (FDL, 2009)

AADL Simulation and Performance Analysis in SystemC. - Roberto Varona-Gomez; Eugenio Villar (ICECCS, 2009)

Automatic HW/SW Interface Modeling for Scratch-Pad and Memory Mapped HW Components in Native Source-Code Co-simulation. - Hector Posadas; Eugenio Villar (IESS, 2009)

Modeling Separate Memory Spaces in Native Co-simulation with SystemC for Design Space Exploration. - Hector Posadas; Eugenio Villar (ARCS Workshops, 2010)

Formal Foundations for MARTE-SystemC Interoperability. - Pablo Peñil; Fernando Herrera; Eugenio Villar (FDL, 2010)

Formal Support for Untimed SystemC Specifications: Application to High-level Synthesis. - Eugenio Villar; Fernando Herrera; Víctor Fernández 001 (FDL, 2010)

Fast instruction cache modeling for approximate timed HW/SW co-simulation. - Juan Castillo; Hector Posadas; Eugenio Villar; Marcos Martínez (ACM Great Lakes Symposium on VLSI, 2010)

Formal Modeling for UML/MARTE Concurrency Resources. - Pablo Peñil; Hector Posadas; Eugenio Villar (ICECCS, 2010)

AADS+: AADL Simulation Including the Behavioral Annex. - Roberto Varona-Gomez; Eugenio Villar (ICECCS, 2010)

Early Modeling of Linux-Based RTOS Platforms in a SystemC Time-Approximate Co-simulation Environment. - Hector Posadas; Eugenio Villar; Dominique Ragot; Marcos Martínez (ISORC, 2010)

The SATURN Approach to SysML-Based HW/SW Codesign. - Wolfgang Müller 003; Da He; Fabian Mischkalla; Arthur Wegele; Adrian Larkham; Paul Whiston; Pablo Peñil; Eugenio Villar; Nikolaos Mitas; Dimitrios Kritharidis; Florent Azcarate; Manuel Carballeda (ISVLSI (Selected papers), 2010)

The SATURN Approach to SysML-Based HW/SW Codesign. - Wolfgang Müller 003; Da He; Fabian Mischkalla; Arthur Wegele; Paul Whiston; Pablo Peñil; Eugenio Villar; Nikolaos Mitas; Dimitrios Kritharidis; Florent Azcarate; Manuel Carballeda (ISVLSI, 2010)

MULTICUBE: Multi-Objective Design Space Exploration of Multi-Core Architectures. - Cristina Silvano; William Fornaciari; Gianluca Palermo; Vittorio Zaccaria; Fabrizio Castro; Marcos Martínez; Sara Bocchio; Roberto Zafalon; Prabhat Avasare; Geert Vanmeerbeeck; Chantal Ykman-Couvreur; Maryse Wouters; et al. (ISVLSI (Selected papers), 2010)

L2 Cache Modeling based on address modification for Native Co-Simulation in SystemC. - Sara Real; Hector Posadas; Eugenio Villar (SIES, 2010)

Generating heterogeneous executable specifications in SystemC from UML/MARTE models. - Pablo Peñil; Julio L. Medina; Hector Posadas; Eugenio Villar (Innov. Syst. Softw. Eng., 2010)

High-level modeling and exploration of a powerline communication network based on System-on-Chip. - Marcos Martínez; David Ferruz; Hector Posadas; Eugenio Villar (Multi-objective Design Space Exploration of Multiprocessor SoC Architectures, 2011)

M3-SCoPE: Performance Modeling of Multi-Processor Embedded Systems for Fast Design Space Exploration. - Hector Posadas; Sara Real; Eugenio Villar (Multi-objective Design Space Exploration of Multiprocessor SoC Architectures, 2011)

The MULTICUBE Design Flow. - Cristina Silvano; William Fornaciari; Gianluca Palermo; Vittorio Zaccaria; Fabrizio Castro; Marcos Martínez; Sara Bocchio; Roberto Zafalon; Prabhat Avasare; Geert Vanmeerbeeck; Chantal Ykman-Couvreur; Maryse Wouters; et al. (Multi-objective Design Space Exploration of Multiprocessor SoC Architectures, 2011)

Fast data-cache modeling for native co-simulation. - Hector Posadas; Luis Diaz; Eugenio Villar (ASP-DAC, 2011)

A framework for the generation from UML/MARTE models of IPXACT HW platform descriptions for multi-level performance estimation. - Fernando Herrera; Eugenio Villar (FDL, 2011)

Systemc refinement of abstract adaptive processes for implementation into Dynamically Reconfigurable Hardware. - Fernando Herrera; Eugenio Villar; Philipp A. Hartmann (FDL, 2011)

Early, time-approximate modeling of multi-OS. linux platforms in a systemC co-simulation environment. - Hector Posadas; Eugenio Villar; Dominique Ragot; Marcos Martínez (Comput. Syst. Sci. Eng., 2011)

A Multi-Processing Systems-on-Chip Native Simulation Framework for Power and Thermal-Aware Design. - Daniel Calvo; Pablo González; Luis Diaz; Hector Posadas; Pablo Sánchez; Eugenio Villar; Andrea Acquaviva; Enrico Macii (J. Low Power Electron., 2011)

A MDD methodology for specification of embedded systems and automatic generation of fast configurable and executable performance models. - Fernando Herrera; Hector Posadas; Pablo Peñil; Eugenio Villar; Francisco Ferrero 002; Raúl Valencia (CODES+ISSS, 2012)

The COMPLEX Eclipse framework for UML/MARTE specification and design space exploration of embedded systems. - Fernando Herrera; Hector Posadas; Pablo Peñil; Eugenio Villar; Francisco Ferrero 002; Raúl Valencia (DASIP, 2012)

Evaluation of High Performance Clusters in Private Cloud Computing Environments. - Julio Gómez López; Eugenio Villar; Gabriel Molero; Alejandro Cama-Pinto (DCAI, 2012)

COMPLEX: COdesign and Power Management in PLatform-Based Design Space EXploration. - Kim Grüttner; Philipp A. Hartmann; Kai Hylla; Sven Rosinger; Wolfgang Nebel; Fernando Herrera; Eugenio Villar; Carlo Brandolese; William Fornaciari; Gianluca Palermo; Chantal Ykman-Couvreur; Davide Quaglia; et al. (DSD, 2012)

Enhanced IP-XACT Platform Descriptions for Automatic Generation from UML/MARTE of Fast Performance Models for DSE. - Fernando Herrera; Hector Posadas; Eugenio Villar; Daniel Calvo (DSD, 2012)

A model-driven methodology for the development of SystemC executable environments. - Fernando Herrera; Pablo Peñil; Hector Posadas; Eugenio Villar (FDL, 2012)

Model-Driven Methodology for the Development of Multi-level Executable Environments. - Fernando Herrera; Pablo Peñil; Hector Posadas; Eugenio Villar (FDL (Selected Papers), 2012)

Automatic synthesis from UML/MARTE models using channel semantics. - Pablo Peñil; Héctor Posadas; Alejandro Nicolás; Eugenio Villar (ACES-MB@MoDELS, 2012)

Towards automated implementation of adaptive systems from abstract SystemC specifications - From SystemC adaptive processes to embedded software and to synthesizable hardware descriptions. - Fernando Herrera; Íñigo Ugarte; Eugenio Villar (Des. Autom. Embed. Syst., 2012)

Early Performance Evaluation of Multi-OS Embedded Platforms Using Native Simulation. - Rodrigo Fernández; Hector Posadas; Eugenio Villar (DSD, 2013)

EU FP7-288307 Pharaon Project: Parallel and Heterogeneous Architecture for Real-Time Applications. - Hector Posadas; Eugenio Villar; Florian Broekaert; Michel Bourdellès; Albert Cohen 001; Antoniu Pop; Nhat Minh Lê; Adrien Guatto; Mihai T. Lazarescu; Luciano Lavagno; Andrei Sergeevich Terechko; Miguel Glassee; et al. (DSD, 2013)

The COMPLEX reference framework for HW/SW co-design and power management supporting platform-based design-space exploration. - Kim Grüttner; Philipp A. Hartmann; Kai Hylla; Sven Rosinger; Wolfgang Nebel; Fernando Herrera; Eugenio Villar; Carlo Brandolese; William Fornaciari; Gianluca Palermo; Chantal Ykman-Couvreur; Davide Quaglia; et al. (Microprocess. Microsystems, 2013)

Automatic Synthesis over Multiple APIs from Uml/Marte Models for Easy Platform Mapping and Reuse. - Alejandro Nicolás; Pablo Peñil; Héctor Posadas; Eugenio Villar (DSD, 2014)

A framework for design space exploration and performance analysis of networked embedded systems. - Emad Samuel Malki Ebeid; Franco Fummi; Davide Quaglia; Hector Posadas; Eugenio Villar (RAPIDO, 2014)

The COMPLEX methodology for UML/MARTE Modeling and design space exploration of embedded systems. - Fernando Herrera; Hector Posadas; Pablo Peñil; Eugenio Villar; Francisco Ferrero 002; Raúl Valencia; Gianluca Palermo (J. Syst. Archit., 2014)

Improving the design flow for parallel and heterogeneous architectures running real-time applications: The PHARAON FP7 project. - Héctor Posadas; Alejandro Nicolás; Pablo Peñil; Eugenio Villar; Florian Broekaert; Michel Bourdellès; Albert Cohen 001; Mihai T. Lazarescu; Luciano Lavagno; Andrei Sergeevich Terechko; Miguel Glassee; Manuel Prieto (Microprocess. Microsystems, 2014)

Automatic synthesis of embedded SW for evaluating physical implementation alternatives from UML/MARTE models supporting memory space separation. - Héctor Posadas; Pablo Peñil; Alejandro Nicolás; Eugenio Villar (Microelectron. J., 2014)

Enhancing analysability and time predictability in UML/MARTE component-based application models. - Fernando Herrera; Pablo Peñil; Eugenio Villar (FDL, 2015)

A model-based, single-source approach to design-space exploration and synthesis of mixed-criticality systems. - Fernando Herrera; Pablo Peñil; Eugenio Villar (SCOPES, 2015)

Automatic synthesis of communication and concurrency for exploring component-based system implementations considering UML channel semantics. - Héctor Posadas; Pablo Peñil; Alejandro Nicolás; Eugenio Villar (J. Syst. Archit., 2015)

Innovative circuit and system design methodologies for green cyber-physical systems. - Jiafu Wan; Chin-Feng Lai; Shiwen Mao; Eugenio Villar; Subhas Mukhopadhyay (Microprocess. Microsystems, 2015)

CONTREX: Design of Embedded Mixed-Criticality CONTRol Systems under Consideration of EXtra-Functional Properties. - Ralph Görgen; Kim Grüttner; Fernando Herrera; Pablo Peñil; Julio L. Medina; Eugenio Villar; Gianluca Palermo; William Fornaciari; Carlo Brandolese; Davide Gadioli; Sara Bocchio; Luca Ceva; et al. (DSD, 2016)

Using Professional Resources for Teaching Embedded SW Development. - Hector Posadas; Eugenio Villar (Rev. Iberoam. de Tecnol. del Aprendiz., 2016)

Static Write Buffer Cache Modeling to Increase Host-Compiled Simulation Accuracy. - Hector Posadas; Luis Diaz; Eugenio Villar (DSD, 2017)

CONTREX: Design of embedded mixed-criticality CONTRol systems under consideration of EXtra-functional properties. - Kim Grüttner; Ralph Görgen; Sören Schreiner; Fernando Herrera; Pablo Peñil; Julio L. Medina; Eugenio Villar; Gianluca Palermo; William Fornaciari; Carlo Brandolese; Davide Gadioli; Emanuele Vitali; et al. (Microprocess. Microsystems, 2017)

Special issue on: "Heterogeneous architectures for Cyber-physical systems (HACPS)". - Houcine Hassan; Laurence T. Yang; Jason Xue 001; Eugenio Villar (Microprocess. Microsystems, 2017)

Modeling Hardware/Software Embedded Systems with UML/MARTE: A Single-Source Design Approach. - Fernando Herrera; Julio L. Medina; Eugenio Villar (Handbook of Hardware/Software Codesign, 2017)

Accelerating Host-Compiled Simulation by Modifying IR Code: Industrial application in the spatial domain. - Héctor Posadas; Eugenio Villar; Manuel Sanchez-Renedo (DCIS, 2019)

Data flow analysis from UML/MARTE models based on binary traces. - Héctor Posadas; Javier Merino; Eugenio Villar (DCIS, 2020)

Key Enabling Technologies for Drones. - Mahmoud Hussein; Réda Nouacer; Yassine Ouhammou; Eugenio Villar; Federico Corradi; Carlo Tieri; Rodrigo Castiñeira (DSD, 2020)

Run-time Monitoring and Trace Analysis Methodology for Component-based Embedded Systems Design Flow. - Vittoriano Muttillo; Giacomo Valente; Luigi Pomante; Hector Posadas; Javier Merino; Eugenio Villar (DSD, 2020)

Mega-modeling of complex, distributed, heterogeneous CPS systems. - Eugenio Villar; Javier Merino; Hector Posadas; Rafik Henia; Laurent Rioux (Microprocess. Microsystems, 2020)

Multilevel host-compiled simulation framework for ROS-based UAV services using ArduCopter. - Javier Merino; Raul Gomez; Hector Posadas; Eugenio Villar (DCIS, 2021)

Modeling and Performance Estimation of Robotic Systems using ROS: Application to drone-based Services. - Javier Merino; Raul Gomez; Hector Posadas; Eugenio Villar (FDL, 2021)

Key technologies for safe and autonomous drones. - Mahmoud Hussein; Réda Nouacer; Federico Corradi; Yassine Ouhammou; Eugenio Villar; Carlo Tieri; Rodrigo Castiñeira (Microprocess. Microsystems, 2021)

Automatic code generation from UML for data memory optimization in microcontrollers. - Héctor Posadas; José Luis Vázquez; Eugenio Villar (DCIS, 2023)

Towards a European Network of Enabling Technologies for Drones. - Réda Nouacer; Mahmoud Hussein; Paul Detterer; Eugenio Villar; Fernando Herrera; Carlo Tieri; Emmanuel Grolleau (DroneSE/RAPIDO@HiPEAC, 2023)

AI-based estimation of embedded software execution cycles in host-compiled simulation. - Raúl Gómez-Varela; David Aledo; Héctor Posadas; Eugenio Villar (DCIS, 2024)