A 1V 136.6dB-DR 4kHz-BW $ Delta Sigma$ Current-to-Digital Converter with a Truncation-Noise-Shaped Baseline-Servo-Loop in 0.18 mu mathrm{m}$ CMOS. - Taeryoung Seol; Sehwan Lee; Geunha Kim; Samhwan Kim; Euiseong Kim; Seungyeob Baik; Jaeha Kung; Ji-Woong Choi; Arup K. George; Junghyup Lee (ISSCC, 2023)