A Study on Improving Accuracy of LPC Transmission Parameter under Digital Mobile Telephone Network. - Geumran Baek; Eunhwan Kim; Myung-Jin Bae 001 (ICHIT (2), 2012)

Analysis of switching frequency variation in self-oscillating class-D audio amplifiers. - Eunhwan Kim; Hyunsun Mo; Daejeong Kim (IEICE Electron. Express, 2014)

8.2 8Mb/s 28Mb/mJ robust true-random-number generator in 65nm CMOS based on differential ring oscillator with feedback resistors. - Eunhwan Kim; Minah Lee; Jae-Joon Kim (ISSCC, 2017)

Configurable BCAM/TCAM Based on 6T SRAM Bit Cell and Enhanced Match Line Clamping. - Jongeun Koo; Eunhwan Kim; Seunghyun Yoo; Taesu Kim; Sungju Ryu; Jae-Joon Kim (A-SSCC, 2019)

A 44.1TOPS/W Precision-Scalable Accelerator for Quantized Neural Networks in 28nm CMOS. - Sungju Ryu; Hyungjun Kim; Wooseok Yi; Jongeun Koo; Eunhwan Kim; Yulhwa Kim; Taesu Kim; Jae-Joon Kim (CICC, 2020)

BitBlade: Energy-Efficient Variable Bit-Precision Hardware Accelerator for Quantized Neural Networks. - Sungju Ryu; Hyungjun Kim; Wooseok Yi; Eunhwan Kim; Yulhwa Kim; Taesu Kim; Jae-Joon Kim (IEEE J. Solid State Circuits, 2022)

In-Memory Neural Network Accelerator based on eDRAM Cell with Enhanced Retention Time. - Inhwan Lee; Eunhwan Kim; Nameun Kang; Hyunmyung Oh; Jae-Joon Kim (DAC, 2023)

A Capacitive Computing-In-Memory Circuit With Low Input Loading SRAM Bitcell and Adjustable ADC Input Range. - Eunhwan Kim; Hyunmyung Oh; Nameun Kang; Jihoon Park; Jae-Joon Kim (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

A 10T2C Capacitive SRAM-based Computing-In-Memory Macro with Array-Embedded DAC and Shift-and-Add Functions. - Eunhwan Kim; Hyunmyung Oh; Jehun Lee; Jihoon Park; Myeongeun Kwon; Jae-Joon Kim (CICC, 2024)