A computer-aided approach for voltage reference circuit design. - Fabian Olivera; Antonio Petraglia (LASCAS, 2015)

Analytic boundaries for 6T-SRAM design in standby mode. - Fabian Olivera; Antonio Petraglia (SBCCI, 2016)

Analytic modeling of static noise margin considering DIBL and body bias effects. - Fabian Olivera; Antonio Petraglia (ISCAS, 2017)

Static noise margin trade-offs for 6T-SRAM cell sizing in 28 nm UTBB FD-SOI CMOS technology. - Fabian Olivera; Antonio Petraglia (Microelectron. J., 2018)

Adjustable Output CMOS Voltage Reference Design. - Fabian Olivera; Antonio Petraglia (IEEE Trans. Circuits Syst. II Express Briefs, 2020)

Closed-Form Analysis of Metastability Voltage in 28-nm UTBB FD-SOI CMOS Technology. - Fabian Olivera; Antonio Petraglia (IEEE Trans. Circuits Syst. II Express Briefs, 2020)

A Three-Stage Charge Pump With Forward Body Biasing in 28 nm UTBB FD-SOI CMOS. - Carlos A. Pinheiro; Fabián Olivera; Antonio Petraglia (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

A 120 mV Supply, Triode-Regulated Femto-Watt CMOS Voltage Reference Design. - Fabián Olivera; Lucas Souza da Silva; Antonio Petraglia (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

Ultra-Low-Power CMOS Voltage Reference Topologies Regarding Technology Node. - Fabián Olivera; Lucas Souza da Silva; Antonio Petraglia (LASCAS, 2022)

EAVREF: An Evolutionary Algorithm Based Tool for Low-Power CMOS Voltage Reference Designs. - Ana Italiano; Luciana Faletti Almeida; Thiago Brito; Mariane R. Petraglia; Fabián Olivera (SBCCI, 2024)

Clonal Selection Algorithm Applied to the Design of Switched-Capacitor DC-DC Converters. - Ricardo Alves-Junior; Matheus Soares; Fernanda D. V. R. Oliveira; Fabián Olivera (LASCAS, 2025)