Needle in a Haystack: Limiting the Search Space in Mission-aware Packet Forwarding for Drones. - Mahdi Asadpour; Mario Burger; Fabian Schuiki; Karin Anna Hummel (SmartObjects@MobiCom, 2015)

NTX: An Energy-efficient Streaming Accelerator for Floating-point Generalized Reduction Workloads in 22nm FD-SOI. - Fabian Schuiki; Michael Schaffner; Luca Benini (CoRR, 2018)

NTX: An Energy-efficient Streaming Accelerator for Floating-point Generalized Reduction Workloads in 22 nm FD-SOI. - Fabian Schuiki; Michael Schaffner; Luca Benini (DATE, 2019)

The Floating Point Trinity: A Multi-modal Approach to Extreme Energy-Efficiency and Performance. - Florian Zaruba; Fabian Schuiki; Stefan Mach; Luca Benini (ICECS, 2019)

NTX: A 260 Gflop/sW Streaming Accelerator for Oblivious Floating-Point Algorithms in 22 nm FD-SOI. - Fabian Schuiki; Michael Schaffner; Luca Benini (ISOCC, 2019)

A 0.80pJ/flop, 1.24Tflop/sW 8-to-64 bit Transprecision Floating-Point Unit for a 64 bit RISC-V Processor in 22nm FD-SOI. - Stefan Mach; Fabian Schuiki; Florian Zaruba; Luca Benini (VLSI-SoC, 2019)

Ara: A 1 GHz+ Scalable and Energy-Efficient RISC-V Vector Processor with Multi-Precision Floating Point Support in 22 nm FD-SOI. - Matheus A. Cavalcante; Fabian Schuiki; Florian Zaruba; Michael Schaffner; Luca Benini (CoRR, 2019)

A Scalable Near-Memory Architecture for Training Deep Neural Networks on Large In-Memory Datasets. - Fabian Schuiki; Michael Schaffner; Frank K. Gürkaynak; Luca Benini (IEEE Trans. Computers, 2019)

Design of an open-source bridge between non-coherent burst-based and coherent cache-line-based memory systems. - Matheus A. Cavalcante; Andreas Kurth; Fabian Schuiki; Luca Benini (CF, 2020)

XwattPilot: A Full-stack Cloud System Enabling Agile Development of Transprecision Software for Low-power SoCs. - Dionysios Diamantopoulos; Florian Scheidegger; Stefan Mach; Fabian Schuiki; Germain Haugou; Michael Schaffner; Frank K. Gürkaynak; Christoph Hagleitner; A. Cristiano I. Malossi; Luca Benini (COOL CHIPS, 2020)

A 4096-core RISC-V Chiplet Architecture for Ultra-efficient Floating-point Computing. - Florian Zaruba; Fabian Schuiki; Luca Benini (Hot Chips Symposium, 2020)

Live Demonstration: Exploiting Body-Biasing for Static Corner Trimming and Maximum Energy Efficiency Operation in 22nm FDX Technology. - Alfio Di Mauro; Florian Zaruba; Fabian Schuiki; Stefan Mach; Luca Benini (ISCAS, 2020)

LLHD: a multi-level intermediate representation for hardware description languages. - Fabian Schuiki; Andreas Kurth; Tobias Grosser; Luca Benini (PLDI, 2020)

Snitch: A 10 kGE Pseudo Dual-Issue Processor for Area and Energy Efficient Execution of Floating-Point Intensive Workloads. - Florian Zaruba; Fabian Schuiki; Torsten Hoefler; Luca Benini (CoRR, 2020)

FPnew: An Open-Source Multi-Format Floating-Point Unit Architecture for Energy-Proportional Transprecision Computing. - Stefan Mach; Fabian Schuiki; Florian Zaruba; Luca Benini (CoRR, 2020)

Manticore: A 4096-core RISC-V Chiplet Architecture for Ultra-efficient Floating-point Computing. - Florian Zaruba; Fabian Schuiki; Luca Benini (CoRR, 2020)

Ara: A 1-GHz+ Scalable and Energy-Efficient RISC-V Vector Processor With Multiprecision Floating-Point Support in 22-nm FD-SOI. - Matheus A. Cavalcante; Fabian Schuiki; Florian Zaruba; Michael Schaffner; Luca Benini (IEEE Trans. Very Large Scale Integr. Syst., 2020)

Indirection Stream Semantic Register Architecture for Efficient Sparse-Dense Linear Algebra. - Paul Scheffler; Florian Zaruba; Fabian Schuiki; Torsten Hoefler; Luca Benini (DATE, 2021)

A 10-core SoC with 20 Fine-Grain Power Domains for Energy-Proportional Data-Parallel Processing over a Wide Voltage and Temperature Range. - Thomas Benz; Luca Bertaccini; Florian Zaruba; Fabian Schuiki; Frank K. Gürkaynak; Luca Benini (ESSCIRC, 2021)

Banshee: A Fast LLVM-Based RISC-V Binary Translator. - Samuel Riedel; Fabian Schuiki; Paul Scheffler; Florian Zaruba; Luca Benini (ICCAD, 2021)

Implementing CNN Layers on the Manticore Cluster-Based Many-Core Architecture. - Andreas Kurth; Fabian Schuiki; Luca Benini (CoRR, 2021)

Manticore: A 4096-Core RISC-V Chiplet Architecture for Ultraefficient Floating-Point Computing. - Florian Zaruba; Fabian Schuiki; Luca Benini (IEEE Micro, 2021)

Stream Semantic Registers: A Lightweight RISC-V ISA Extension Achieving Full Compute Utilization in Single-Issue Cores. - Fabian Schuiki; Florian Zaruba; Torsten Hoefler; Luca Benini (IEEE Trans. Computers, 2021)

Snitch: A Tiny Pseudo Dual-Issue Processor for Area and Energy Efficient Execution of Floating-Point Intensive Workloads. - Florian Zaruba; Fabian Schuiki; Torsten Hoefler; Luca Benini (IEEE Trans. Computers, 2021)

FPnew: An Open-Source Multiformat Floating-Point Unit Architecture for Energy-Proportional Transprecision Computing. - Stefan Mach; Fabian Schuiki; Florian Zaruba; Luca Benini (IEEE Trans. Very Large Scale Integr. Syst., 2021)

Streaming architectures for extreme energy efficiency in high-performance computing. - Fabian Schuiki (Hartung-Gorre Verlag, 2021)

An Open-Source Platform for High-Performance Non-Coherent On-Chip Communication. - Andreas Kurth; Wolfgang Rönninger; Thomas Benz; Matheus A. Cavalcante; Fabian Schuiki; Florian Zaruba; Luca Benini (IEEE Trans. Computers, 2022)

Sparse Stream Semantic Registers: A Lightweight ISA Extension Accelerating General Sparse Linear Algebra. - Paul Scheffler; Florian Zaruba; Fabian Schuiki; Torsten Hoefler; Luca Benini (IEEE Trans. Parallel Distributed Syst., 2023)