A New Placement Algorithm Dedicated to Parallel Computers: Bases and Application. - Fabien Clermidy; Thierry Collette; Michael Nicolaidis (PRDC, 1999)

An Asynchronous NOC Architecture Providing Low Latency Service and Its Multi-Level Design Framework. - Edith Beigné; Fabien Clermidy; Pascal Vivet; Alain Clouard; Marc Renaudin (ASYNC, 2005)

Performance Evaluation of a NoC-Based Design for MC-CDMA Telecommunications Using NS-2. - Romain Lemaire; Fabien Clermidy; Yves Durand; Didier Lattard; Ahmed Amine Jerraya (IEEE International Workshop on Rapid System Prototyping, 2005)

A Non-Volatile Multi-Level Memory Cell Using Molecular-Gated Nanowire Transistors. - Antoine Jalabert; Fabien Clermidy; Amara Amara (ICECS, 2006)

A Comparison between NoC and Bus Architectures Based on a Real-Application. - Diego Puschini; Fabien Clermidy (ReCoSoC, 2006)

A Telecom Baseband Circuit based on an Asynchronous Network-on-Chip. - Didier Lattard; Edith Beigné; Christian Bernard; Catherine Bour; Fabien Clermidy; Yves Durand; Jean Durupt; Didier Varreau; Pascal Vivet; Pierre Penard; Arnaud Bouttier; Friedbert Berens (ISSCC, 2007)

A fully integrated power supply unit for fine grain power management application to embedded Low Voltage SRAMs. - Edith Beigné; Fabien Clermidy; Sylvain Miermont; Alexandre Valentian; Pascal Vivet; S. Barasinski; F. Blisson; N. Kohli; S. Kumar (ESSCIRC, 2008)

Convergence analysis of run-time distributed optimization on adaptive systems using game theory. - Diego Puschini; Fabien Clermidy; Pascal Benoit; Gilles Sassatelli; Lionel Torres (FPL, 2008)

Temperature-Aware Distributed Run-Time Optimization on MP-SoC Using Game Theory. - Diego Puschini; Fabien Clermidy; Pascal Benoit; Gilles Sassatelli; Lionel Torres (ISVLSI, 2008)

Dynamic Voltage and Frequency Scaling Architecture for Units Integration within a GALS NoC. - Edith Beigné; Fabien Clermidy; Sylvain Miermont; Pascal Vivet (NOCS, 2008)

Physical Implementation of the DSPIN Network-on-Chip in the FAUST Architecture. - Ivan Miro Panades; Fabien Clermidy; Pascal Vivet; Alain Greiner (NOCS, 2008)

Game-Theoretic Approach for Temperature-Aware Frequency Assignment with Task Synchronization on MP-SoC. - Diego Puschini; Fabien Clermidy; Pascal Benoit; Gilles Sassatelli; Lionel Torres (ReConFig, 2008)

A Game-Theoretic Approach for Run-Time Distributed Optimization on MP-SoC. - Diego Puschini; Fabien Clermidy; Pascal Benoit; Gilles Sassatelli; Lionel Torres (Int. J. Reconfigurable Comput., 2008)

A Reconfigurable Baseband Platform Based on an Asynchronous Network-on-Chip. - Didier Lattard; Edith Beigné; Fabien Clermidy; Yves Durand; Romain Lemaire; Pascal Vivet; Friedbert Berens (IEEE J. Solid State Circuits, 2008)

A monitoring and adaptive routing mechanism for QoS traffic on mesh NoC architectures. - Leonel Tedesco; Fabien Clermidy; Fernando Moraes 001 (CODES+ISSS, 2009)

Dynamic and distributed frequency assignment for energy and latency constrained MP-SoC. - Diego Puschini; Fabien Clermidy; Pascal Benoit; Gilles Sassatelli; Lionel Torres (DATE, 2009)

An Open and Reconfigurable Platform for 4G Telecommunication: Concepts and Application. - Fabien Clermidy; Romain Lemaire; Xavier Popon; Dimitri Ktenas; Yvain Thonnart (DSD, 2009)

Open Platform for Prototyping of Advanced Software Defined Radio and Cognitive Radio Techniques. - Dominique Nussbaum; Karim Khalfallah; Christophe Moy; Amor Nafkha; Pierre Leray; Julien Delorme; Jacques Palicot; Jérôme Martin; Fabien Clermidy; Bertrand Mercier; Renaud Pacalet (DSD, 2009)

A Microprogrammable Memory Controller for high-performance dataflow applications. - Jérôme Martin; Christian Bernard; Fabien Clermidy; Yves Durand (ESSCIRC, 2009)

Reconfigurable nanoscale logic cells : a comparison study. - Pierre-Emmanuel Gaillardon; Fabien Clermidy; Ian O'Connor; Renaud Daviot (ICECS, 2009)

Mapping method of reconfigurable cell matrices based on nanoscale devices using inter-stage fixed interconnection scheme. - Pierre-Emmanuel Gaillardon; Fabien Clermidy; Ian O'Connor; Junchen Liu; Renaud Daviot (ICECS, 2009)

Interconnection scheme and associated mapping method of reconfigurable cell matrices based on nanoscale devices. - Pierre-Emmanuel Gaillardon; Fabien Clermidy; Ian O'Connor; Junchen Liu (NANOARCH, 2009)

A Communication and configuration controller for NoC based reconfigurable data flow architecture. - Fabien Clermidy; Romain Lemaire; Yvain Thonnart; Pascal Vivet (NOCS, 2009)

A path-load based adaptive routing algorithm for networks-on-chip. - Leonel Tedesco; Fabien Clermidy; Fernando Moraes 001 (SBCCI, 2009)

Adaptive energy-aware latency-constrained DVFS policy for MPSoC. - Diego Puschini; Fabien Clermidy; Pascal Benoit; Gilles Sassatelli; Lionel Torres (SoCC, 2009)

Emerging Technologies and Nanoscale Computing Fabrics. - Ian O'Connor; Junchen Liu; Kotb Jabeur; Nataliya Yakymets; Renaud Daviot; David Navarro; Pierre-Emmanuel Gaillardon; Fabien Clermidy; Maimouna Amadou; Gabriela Nicolescu (VLSI-SoC, 2009)

An Asynchronous Power Aware and Adaptive NoC Based Circuit. - Edith Beigné; Fabien Clermidy; Hélène Lhermet; Sylvain Miermont; Yvain Thonnart; Xuan-Tu Tran; Alexandre Valentian; Didier Varreau; Pascal Vivet; Xavier Popon; Hugo Lebreton (IEEE J. Solid State Circuits, 2009)

An in-memory monitoring database for self adaptive MP2SoCs. - Etienne Faure; Gabriel Marchesan Almeida; Mounir Benabdenbi; Pascal Benoit; Fabien Clermidy; François Pêcheux; Gilles Sassatelli; Lionel Torres (DASIP, 2010)

A fully-asynchronous low-power framework for GALS NoC integration. - Yvain Thonnart; Pascal Vivet; Fabien Clermidy (DATE, 2010)

Phase-change-memory-based storage elements for configurable logic. - Pierre-Emmanuel Gaillardon; M. Haykel Ben Jamaa; Marina Reyboz; Giovanni Beneventi; Fabien Clermidy; Luca Perniola; Ian O'Connor (FPT, 2010)

Emerging memory technologies for reconfigurable routing in FPGA architecture. - Pierre-Emmanuel Gaillardon; M. Haykel Ben Jamaa; Giovanni Betti Beneventi; Fabien Clermidy; Luca Perniola (ICECS, 2010)

Logic cells and interconnect strategies for nanoscale reconfigurable computing fabrics. - Ian O'Connor; Kotb Jabeur; David Navarro; Nataliya Yakymets; Pierre-Emmanuel Gaillardon; M. Haykel Ben Jamaa; Fabien Clermidy (ICECS, 2010)

A 477mW NoC-based digital baseband for MIMO 4G SDR. - Fabien Clermidy; Christian Bernard; Romain Lemaire; Jérôme Martin; Ivan Miro Panades; Yvain Thonnart; Pascal Vivet; Norbert Wehn (ISSCC, 2010)

Power consumption analysis and energy efficient optimization for turbo decoder implementation. - Pallavi Reddy; Fabien Clermidy; Rasheed Al Khayat; Amer Baghdadi; Michel Jézéquel (SoC, 2010)

Implementation Analysis of a Dynamic Energy Management Approach Inspired by Game-Theory. - Imen Mansouri; Camille Jalier; Fabien Clermidy; Pascal Benoit; Lionel Torres (ISVLSI, 2010)

Reducing transistor count in clocked standard cells with ambipolar double-gate FETs. - Kotb Jabeur; David Navarro; Ian O'Connor; Pierre-Emmanuel Gaillardon; M. Haykel Ben Jamaa; Fabien Clermidy (NANOARCH, 2010)

Distributed Sequencing for Resource Sharing in Multi-applicative Heterogeneous NoC Platforms. - Yvain Thonnart; Romain Lemaire; Fabien Clermidy (NOCS, 2010)

Implementation and evaluation of a congestion aware routing algorithm for networks-on-chip. - Leonel Tedesco; Thiago R. da Rosa; Fabien Clermidy; Ney Calazans; Fernando Gehm Moraes (SBCCI, 2010)

A run-time distributed cooperative approach to optimize power consumption in MPSoCs. - Imen Mansouri; Fabien Clermidy; Pascal Benoit; Lionel Torres (SoCC, 2010)

Dynamic Energy Optimization in Network-on-Chip-Based System-on-Chips. - Imen Mansouri; Pascal Benoit; Diego Puschini; Lionel Torres; Fabien Clermidy; Gilles Sassatelli (J. Low Power Electron., 2010)

An Introduction to Multi-Core System on Chip - Trends and Challenges. - Lionel Torres; Pascal Benoit; Gilles Sassatelli; Michel Robert; Fabien Clermidy; Diego Puschini (Multiprocessor System-on-Chip, 2011)

Memory controllers for high-performance and real-time MPSoCs: requirements, architectures, and future trends. - Benny Akesson; Po-Chun Huang; Fabien Clermidy; Denis Dutoit; Kees Goossens; Yuan-Hao Chang 001; Tei-Wei Kuo; Pascal Vivet; Drew Wingard (CODES+ISSS, 2011)

Can we go towards true 3-D architectures? - Pierre-Emmanuel Gaillardon; M. Haykel Ben Jamaa; Paul-Henry Morel; Jean-Philippe Noël; Fabien Clermidy; Ian O'Connor (DAC, 2011)

A low-power VLIW processor for 3GPP-LTE complex numbers processing. - Christian Bernard; Fabien Clermidy (DATE, 2011)

3D Embedded multi-core: Some perspectives. - Fabien Clermidy; Florian Darve; Denis Dutoit; Walid Lafi; Pascal Vivet (DATE, 2011)

Sustainability through massively integrated computing: Are we ready to break the energy efficiency wall for single-chip platforms? - Partha Pratim Pande; Fabien Clermidy; Diego Puschini; Imen Mansouri; Paul Bogdan; Radu Marculescu; Amlan Ganguly (DATE, 2011)

A low complexity stopping criterion for reducing power consumption in turbo decoders. - Pallavi Reddy; Fabien Clermidy; Amer Baghdadi; Michel Jézéquel (DATE, 2011)

Dynamic Flow Reconfiguration Strategy to Avoid Communication Hot-Spots. - Romain Prolonge; Fabien Clermidy; Leonel Tedesco; Fernando Moraes 001 (DSD, 2011)

Evaluation of a crossbar multiplexer in a lithography-based nanowire technology. - Pierre-Emmanuel Gaillardon; M. Haykel Ben Jamaa; Fabien Clermidy; Ian O'Connor (ISCAS, 2011)

Ultra-fine grain FPGAs: A granularity study. - Pierre-Emmanuel Gaillardon; M. Haykel Ben Jamaa; Fabien Clermidy; Ian O'Connor (NANOARCH, 2011)

Using OxRRAM memories for improving communications of reconfigurable FPGA architectures. - Santhosh Onkaraiah; Pierre-Emmanuel Gaillardon; Marina Reyboz; Fabien Clermidy; Jean-Michel Portal; Marc Bocquet; Christophe Muller (NANOARCH, 2011)

Reconfiguration of a 3GPP-LTE telecommunication application on a 22-core NoC-based system-on-chip. - Fabien Clermidy; Nicolas Cassiau; N. Coste; Denis Dutoit; M. Fantini; Dimitri Ktenas; Romain Lemaire; L. Stefanizzi (NOCS, 2011)

3D NoC using through silicon Via: An asynchronous implementation. - Pascal Vivet; Denis Dutoit; Yvain Thonnart; Fabien Clermidy (VLSI-SoC, 2011)

Matrix Nanodevice-Based Logic Architectures and Associated Functional Mapping Method. - Pierre-Emmanuel Gaillardon; Fabien Clermidy; Ian O'Connor; Junchen Liu; Maimouna Amadou; Gabriela Nicolescu (ACM J. Emerg. Technol. Comput. Syst., 2011)

Platform 2012, a many-core computing accelerator for embedded SoCs: performance evaluation of visual analytics applications. - Diego Melpignano; Luca Benini; Eric Flamand; Bruno Jego; Thierry Lepley; Germain Haugou; Fabien Clermidy; Denis Dutoit (DAC, 2012)

Design challenges for nano-scale devices. - Marc Belleville; Olivier Thomas; Alexandre Valentian; Fabien Clermidy (ESSDERC, 2012)

Bipolar ReRAM Based non-volatile flip-flops for low-power architectures. - Santhosh Onkaraiah; Marina Reyboz; Fabien Clermidy; Jean-Michel Portal; Marc Bocquet; Christophe Muller; Hraziia; Costin Anghel; Amara Amara (NEWCAS, 2012)

A dynamic stream link for efficient data flow control in NoC based heterogeneous MPSoC. - Claude Helmstetter; Sylvain Basset; Romain Lemaire; Fabien Clermidy; Pascal Vivet; Michel Langevin; Chuck Pilkington; Pierre G. Paulin; Didier Fuin (ASP-DAC, 2013)

A CBRAM-based compact interconnect switch for non-volatile reconfigurable logic circuits. - Santhosh Onkaraiah; Marc Belleville; Marina Reyboz; Fabien Clermidy; Elisa Vianello; Jean-Michel Portal; Christophe Muller (ICICDT, 2013)

3D stacking for multi-core architectures: From WIDEIO to distributed caches. - Fabien Clermidy; Denis Dutoit; Eric Guthmuller; Ivan Miro Panades; Pascal Vivet (ISCAS, 2013)

A hybrid CBRAM/CMOS Look-Up-Table structure for improving performance efficiency of Field-Programmable-Gate-Array. - Santhosh Onkaraiah; Ogun Turkyilmaz; Marina Reyboz; Fabien Clermidy; Elisa Vianello; Jean-Michel Portal; Christophe Muller (ISCAS, 2013)

Self-checking ripple-carry adder with Ambipolar Silicon NanoWire FET. - Ogun Turkyilmaz; Fabien Clermidy; Luca Gaetano Amarù; Pierre-Emmanuel Gaillardon; Giovanni De Micheli (ISCAS, 2013)

Network-on-chip traffic modeling for data flow applications. - Romain Prolonge; Fabien Clermidy (RAPIDO, 2013)

Fine-Grain Dynamic Energy Tracking for System on Chip. - Imen Mansouri; Pascal Benoit; Lionel Torres; Fabien Clermidy (IEEE Trans. Circuits Syst. II Express Briefs, 2013)

Advanced technologies for brain-inspired computing. - Fabien Clermidy; Rodolphe Héliot; Alexandre Valentian; Christian Gamrat; Olivier Bichler; Marc Duranton; Bilel Belhadj; Olivier Temam (ASP-DAC, 2014)

A scalable custom simulation machine for the Bayesian Confidence Propagation Neural Network model of the brain. - Nasim Farahini; Ahmed Hemani; Anders Lansner; Fabien Clermidy; Christer Svensson (ASP-DAC, 2014)

3DCoB: A new design approach for Monolithic 3D Integrated circuits. - Hossam Sarhan; Sébastien Thuries; Olivier Billoint; Fabien Clermidy (ASP-DAC, 2014)

Resistive memories: Which applications? - Fabien Clermidy; Natalija Jovanovic; Santhosh Onkaraiah; Houcine Oucheikh; Olivier Thomas; Ogun Turkyilmaz; Elisa Vianello; Jean-Michel Portal; Marc Bocquet (DATE, 2014)

3D FPGA using high-density interconnect Monolithic Integration. - Ogun Turkyilmaz; Gerald Cibrario; Olivier Rozeau; Perrine Batude; Fabien Clermidy (DATE, 2014)

27.1 A 460MHz at 397mV, 2.6GHz at 1.3V, 32b VLIW DSP, embedding FMAX tracking. - Robin Wilson; Edith Beigné; Philippe Flatresse; Alexandre Valentian; Fady Abouzeid; Thomas Benoist; Christian Bernard; Sebastien Bernard; Olivier Billoint; Sylvain Clerc; Bastien Giraud; Anuj Grover; et al. (ISSCC, 2014)

3D technologies for reconfigurable architectures. - Fabien Clermidy; O. Turkyimaz; Olivier Billoint; Pierre-Emmanuel Gaillardon (ReCoSoC, 2014)

RRAM-based FPGA for "Normally Off, Instantly On" applications. - Ogun Turkyilmaz; Santhosh Onkaraiah; Marina Reyboz; Fabien Clermidy; Hraziia; Costin Anghel; Jean-Michel Portal; Marc Bocquet (J. Parallel Distributed Comput., 2014)

Intermediate BEOL process influence on power and performance for 3DVLSI. - Hossam Sarhan; Sébastien Thuries; Olivier Billoint; Fabien Deprat; Alexandre Ayres De Sousa; Perrine Batude; Claire Fenouillet-Béranger; Fabien Clermidy (3DIC, 2015)

3D advanced integration technology for heterogeneous systems. - Pascal Vivet; Christian Bernard; Fabien Clermidy; Denis Dutoit; Eric Guthmuller; Ivan Miro Panades; Gaël Pillonnet; Yvain Thonnart; Arnaud Garnier; Didier Lattard; Amandine Jouve; Franck Bana; et al. (3DIC, 2015)

A comprehensive study of monolithic 3D cell on cell design using commercial 2D tool. - Olivier Billoint; Hossam Sarhan; Iyad Rayane; Maud Vinet; Perrine Batude; Claire Fenouillet-Béranger; Olivier Rozeau; Gerald Cibrario; Fabien Deprat; A. Fustier; Julien Michallet; Olivier Faynot; et al. (DATE, 2015)

A Co-design Approach for Hardware Optimizations in Multicore Architectures Using MCAPI. - Thiago Raupp da Rosa; Romain Lemaire; Fabien Clermidy (INA-OCMC@HiPEAC, 2015)

Fine-grain DVFS and AVFS techniques for complex SoC design: An overview of architectural solutions through technology nodes. - Edith Beigné; Fabien Clermidy; Didier Lattard; Ivan Miro Panades; Yvain Thonnart; Pascal Vivet (ISCAS, 2015)

Emerging resistive memories for low power embedded applications and neuromorphic systems. - Barbara De Salvo; Elisa Vianello; Olivier Thomas; Fabien Clermidy; Olivier Bichler; Christian Gamrat; Luca Perniola (ISCAS, 2015)

From 2D to Monolithic 3D: Design Possibilities, Expectations and Challenges. - Olivier Billoint; Hossam Sarhan; Iyad Rayane; Maud Vinet; Perrine Batude; Claire Fenouillet-Béranger; Olivier Rozeau; Gerald Cibrario; Fabien Deprat; Ogun Turkyilmaz; Sébastien Thuries; Fabien Clermidy (ISPD, 2015)

An Unbalanced Area Ratio Study for High Performance Monolithic 3D Integrated Circuits. - Hossam Sarhan; Sébastien Thuries; Olivier Billoint; Fabien Clermidy (ISVLSI, 2015)

Interconnect Challenges for 3D Multi-cores: From 3D Network-on-Chip to Cache Interconnects. - Pascal Vivet; Christian Bernard; Eric Guthmuller; Ivan Miro Panades; Yvain Thonnart; Fabien Clermidy (ISVLSI, 2015)

Compact interconnect approach for networks of neural cliques using 3D technology. - Bartosz Boguslawski; Hossam Sarhan; Frédéric Heitzmann; Fabrice Seguin; Sébastien Thuries; Olivier Billoint; Fabien Clermidy (VLSI-SoC, 2015)

193 MOPS/mW @ 162 MOPS, 0.32V to 1.15V voltage range multi-core accelerator for energy efficient parallel and sequential digital processing. - Davide Rossi; Antonio Pullini; Igor Loi; Michael Gautschi; Frank Kagan Gürkaynak; Adam Teman; Jeremy Constantin; Andreas Burg 001; Ivan Miro Panades; Edith Beigné; Fabien Clermidy; Fady Abouzeid; et al. (COOL Chips, 2016)

MCAPI-compliant Hardware Buffer Manager mechanism to support communication in multi-core architectures. - Thiago Raupp da Rosa; Thomas Mesquida; Romain Lemaire; Fabien Clermidy (DATE, 2016)

Impact of intermediate BEOL technology on standard cell performances of 3D VLSI. - Melanie Brocard; Guillaume Berhault; Sébastien Thuries; Fabien Clermidy; Perrine Batude; Claire Fenouillet-Béranger; Laurent Brunet; François Andrieu; Fabien Deprat; Joris Lacord; Olivier Rozeau; Gerald Cibrario; et al. (ESSDERC, 2016)

Opportunities brought by sequential 3D CoolCube™ integration. - Maud Vinet; Perrine Batude; Claire Fenouillet-Béranger; Laurent Brunet; Vincent Mazzocchi; Cao-Minh Vincent Lu; Fabien Deprat; Jessy Micout; Bernard Previtali; Paul Besombes; Nils Rambal; François Andrieu; et al. (ESSDERC, 2016)

8.1 A 4×4×2 homogeneous scalable 3D network-on-chip circuit with 326MFlit/s 0.66pJ/b robust and fault-tolerant asynchronous 3D links. - Pascal Vivet; Yvain Thonnart; Romain Lemaire; Edith Beigné; Christian Bernard; Florian Darve; Didier Lattard; Ivan Miro Panades; Cristiano Santos; Fabien Clermidy; Séverine Cheramy; Frédéric Pétrot; et al. (ISSCC, 2016)

Distributed Dynamic Rate Adaptation on a Network on Chip with Traffic Distortion. - Yves Durand; Christian Bernard; Fabien Clermidy (MCSoC, 2016)

A 4 × 4 × 2 Homogeneous Scalable 3D Network-on-Chip Circuit With 326 MFlit/s 0.66 pJ/b Robust and Fault Tolerant Asynchronous 3D Links. - Pascal Vivet; Yvain Thonnart; Romain Lemaire; Cristiano Santos; Edith Beigné; Christian Bernard; Florian Darve; Didier Lattard; Ivan Miro Panades; Denis Dutoit; Fabien Clermidy; Séverine Cheramy; et al. (IEEE J. Solid State Circuits, 2017)

Energy-Efficient Near-Threshold Parallel Computing: The PULPv2 Cluster. - Davide Rossi; Antonio Pullini; Igor Loi; Michael Gautschi; Frank Kagan Gürkaynak; Adam Teman; Jeremy Constantin; Andreas Burg 001; Ivan Miro Panades; Edith Beigné; Fabien Clermidy; Philippe Flatresse; et al. (IEEE Micro, 2017)

Cell-on-Buffer: New design approach for high-performance and low-power monolithic 3D integrated circuits. - Hossam Sarhan; Sébastien Thuries; Olivier Billoint; Fabien Clermidy (Microelectron. J., 2017)

Advanced 3D Technologies and Architectures for 3D Smart Image Sensors. - Pascal Vivet; Gilles Sicard; Laurent Millet; Stéphane Chevobbe; Karim Ben Chehida; Luis Angel Cubero; Monte Alegre; Maxence Bouvier; Alexandre Valentian; Maria Lepecq; Thomas Dombek; Olivier Bichler; et al. (DATE, 2019)

2.3 A 220GOPS 96-Core Processor with 6 Chiplets 3D-Stacked on an Active Interposer Offering 0.6ns/mm Latency, 3Tb/s/mm2 Inter-Chiplet Interconnects and 156mW/mm2@ 82%-Peak-Efficiency DC-DC Converters. - Pascal Vivet; Eric Guthmuller; Yvain Thonnart; Gaël Pillonnet; Guillaume Moritz; Ivan Miro-Panades; César Fuguet Tortolero; Jean Durupt; Christian Bernard; Didier Varreau; Julian J. H. Pontes; Sébastien Thuries; et al. (ISSCC, 2020)

SamurAI: A 1.7MOPS-36GOPS Adaptive Versatile IoT Node with 15, 000× Peak-to-Idle Power Reduction, 207ns Wake-Up Time and 1.3TOPS/W ML Efficiency. - Ivan Miro Panades; Benoît Tain; Jean-Frédéric Christmann; David Coriat; Romain Lemaire; Clement Jany; Baudouin Martineau; Fabrice Chaix; Anthony Quelen; Emmanuel Pluchart; Jean-Philippe Noel; Reda Boumchedda; et al. (VLSI Circuits, 2020)

IntAct: A 96-Core Processor With Six Chiplets 3D-Stacked on an Active Interposer With Distributed Interconnects and Integrated Power Management. - Pascal Vivet; Eric Guthmuller; Yvain Thonnart; Gaël Pillonnet; César Fuguet Tortolero; Ivan Miro-Panades; Guillaume Moritz; Jean Durupt; Christian Bernard; Didier Varreau; Julian J. H. Pontes; Sébastien Thuries; et al. (IEEE J. Solid State Circuits, 2021)

SamurAI: A Versatile IoT Node With Event-Driven Wake-Up and Embedded ML Acceleration. - Ivan Miro-Panades; Benoît Tain; Jean-Frédéric Christmann; David Coriat; Romain Lemaire; Clement Jany; Baudouin Martineau; Fabrice Chaix; Guillaume Waltener; Emmanuel Pluchart; Jean-Philippe Noel; Adam Makosiej; et al. (IEEE J. Solid State Circuits, 2023)

Dose Effects and Mitigation in 28nm FD-SOI Advanced Interface Bus Chiplet Interconnect. - Antoine Rouget; Fady Abouzeid; Adrian Evans; Victor Malherbe; Aleksandra Chumakova; Philippe Roche; Fabien Clermidy (IOLTS, 2025)