Impact evaluation of logic blocks configuration on FPGA's soft error rate estimation. - Fábio B. Armelin; Lírida A. B. Naviner; Roberto d'Amore; Irany A. Azevedo (ICECS, 2016)

Using FPGA self-produced transients to emulate SETs for SER estimation. - Fábio B. Armelin; Lírida A. B. Naviner; Roberto d'Amore (LATS, 2018)

Probability aware fault-injection approach for SER estimation. - Fábio B. Armelin; Lirida A. B. Naviner; Roberto d'Amore (LATS, 2018)