Linking Codesign and Verification by Means of E-LOTOS FDT. - Pierre Wodey; Fabrice Baray (EUROMICRO, 1999)

LOTOS Code Generation for Model Checking of STBus Based SoC: the STBus interconnect. - Pierre Wodey; Geoffrey Camarroque; Fabrice Baray; Richard Hersemeule; Jean-Philippe Cousin (MEMOCODE, 2003)

Code-Based Test Generation for Validation of Functional Processor Descriptions. - Fabrice Baray; Philippe Codognet; Daniel Diaz 001; Henri Michel (TACAS, 2003)

Bee+Cl@k: an implementation of lattice-based array contraction in the source-to-source translator rose. - Christophe Alias; Fabrice Baray; Alain Darte (LCTES, 2007)