A Generic Support for Distributed Deliberations. - Jacques Lonchamp; Fabrice Muller (HPCN Europe, 2001)

Computer-Supported Deliberations for Distributed Teams. - Jacques Lonchamp; Fabrice Muller (IICS, 2001)

Contentions-conscious dynamic but deterministic scheduling of computational and communication tasks. - Muhammad Farooq 008; Fabrice Muller; Michel Auguin (SAC, 2006)

FPGA-based generic neural network architecture. - Nicole Chalhoub; Fabrice Muller; Michel Auguin (IES, 2006)

Weight Bound Limits in Supertasking Approach for Guaranteed Timeline Constraints. - Muhammad Farooq 008; Fabrice Muller; Michel Auguin (ICPP Workshops, 2008)

Off-line placement of hardware tasks on FPGA. - Ikbel Belaid; Fabrice Muller; Maher Benjemaa (FPL, 2009)

New Three-level Resource Management for Off-line Placement of Hardware Tasks on Reconfigurable Devices. - Ikbel Belaid; Fabrice Muller; Maher Benjemaa (ReCoSoC, 2010)

New Three-Level Resource Management Enhancing Quality of Offline Hardware Task Placement on FPGA. - Ikbel Belaid; Fabrice Muller; Maher Benjemaa (Int. J. Reconfigurable Comput., 2010)

Architectures multiprocesseurs, distribuées et reconfigurables dynamiquement pour les applications temps réel. - Fabrice Muller (2011)

FaRM: Fast Reconfiguration Manager for Reducing Reconfiguration Time Overhead on FPGA. - François Duhem; Fabrice Muller; Philippe Lorenzini (ARC, 2011)

Methodology for designing partially reconfigurable systems using transaction-level modeling. - François Duhem; Fabrice Muller; Philippe Lorenzini (DASIP, 2011)

Placement of Hardware Tasks on FPGA using the Bees Algorithm. - Bassem Ouni; Ikbel Belaid; Fabrice Muller; Maher Benjemaa (PECCS, 2011)

Schedulers-Driven approach for dynamic placement/scheduling of multiple DAGs onto SoPCs. - Ikbel Belaid; Fabrice Muller; Maher Benjemaa (International Symposium on Rapid System Prototyping, 2011)

Static Scheduling of Periodic Hardware Tasks with Precedence and Deadline Constraints on Reconfigurable Hardware Devices. - Ikbel Belaid; Fabrice Muller; Maher Benjemaa (Int. J. Reconfigurable Comput., 2011)

Fast integration of hardware accelerators for dynamically reconfigurable architecture. - Clément Foucher; Fabrice Muller; Alain Giulieri (ReCoSoC, 2012)

Reconfiguration time overhead on field programmable gate arrays: reduction and cost model. - François Duhem; Fabrice Muller; Philippe Lorenzini (IET Comput. Digit. Tech., 2012)

Complete and Approximate Methods for Off-Line Placement of Hardware Tasks on Reconfigurable Devices. - Ikbel Belaid; Bassem Ouni; Fabrice Muller; Maher Benjemaa (J. Circuits Syst. Comput., 2013)

Design space exploration for partially reconfigurable architectures in real-time systems. - François Duhem; Fabrice Muller; Willy Aubry; Bertrand Le Gal; Daniel Négru; Philippe Lorenzini (J. Syst. Archit., 2013)

Dynamically reconfigurable entropy coder for multi-standard video adaptation using FaRM. - François Duhem; Nicolas Marques; Fabrice Muller; Hassan Rabah; Serge Weber; Philippe Lorenzini (Microprocess. Microsystems, 2013)

Online codesign on reconfigurable platform for parallel computing. - Clément Foucher; Fabrice Muller; Alain Giulieri (Microprocess. Microsystems, 2013)

Méthodologie dédiée aux applications parallèles sur plateforme reconfigurable dynamiquement. - Clément Foucher; Fabrice Muller; Alain Giulieri (Tech. Sci. Informatiques, 2013)

An energy-aware scheduler for dynamically reconfigurable multi-core systems. - Robin Bonamy; Sébastien Bilavarn; Fabrice Muller (ReCoSoC, 2015)

FoRTReSS: a flow for design space exploration of partially reconfigurable systems. - François Duhem; Fabrice Muller; Robin Bonamy; Sébastien Bilavarn (Des. Autom. Embed. Syst., 2015)

Energy efficient mapping on manycore with dynamic and partial reconfiguration: Application to a smart camera. - Robin Bonamy; Sébastien Bilavarn; Fabrice Muller; François Duhem; Simon Heywood; Philippe Millet; Fabrice Lemonnier (Int. J. Circuit Theory Appl., 2018)