Reduction of Fault Detection Costs through Testable Design of Sequential Architectures with Signal Feedbacks. - Massimo Bombana; Giacomo Buonanno; Patrizia Cavalloro; Fabrizio Ferrandi; Donatella Sciuto; Giuseppe Zaza (DFT, 1993)

An Expert Solution to Functional Testability Analysis of VLSI Circuits. - Massimo Bombana; Giacomo Buonanno; Patrizia Cavalloro; Fabrizio Ferrandi; Donatella Sciuto; Giuseppe Zaza (SEKE, 1993)

Reduction of fault detection costs through a BDD formalism. - Fabrizio Ferrandi (Microprocess. Microprogramming, 1994)

ALADIN: a multilevel testability analyzer for VLSI system design. - Massimo Bombana; Giacomo Buonanno; Patrizia Cavalloro; Fabrizio Ferrandi; Donatella Sciuto; Giuseppe Zaza (IEEE Trans. Very Large Scale Integr. Syst., 1994)

Data Path Testability Analysis Based on BDDs. - Giacomo Buonanno; Fabrizio Ferrandi; Donatella Sciuto (ISCAS, 1995)

Symbolic Optimization of FSM Networks Based on Sequential ATPG Techniques. - Fabrizio Ferrandi; Franco Fummi; Enrico Macii; Massimo Poncino; Donatella Sciuto (DAC, 1996)

BDD-based testability estimation of VHDL designs. - Enrico Macii; Massimo Poncino; Fabrizio Ferrandi; Franco Fummi; Donatella Sciuto (EURO-DAC, 1996)

Test Generation for Networks of Interacting FSMs Using Symbolic Techniques. - Fabrizio Ferrandi; Franco Fummi; Enrico Macii; Massimo Poncino; Donatella Sciuto (Great Lakes Symposium on VLSI, 1996)

Implicit Test Sequences Compaction for Decreasing Test Application Cos. - Roberto Bevacqua; Luca Guerrazzi; Fabrizio Ferrandi; Franco Fummi (ICCD, 1996)

Property verification in the design of telecom applications. - Massimo Bombana; Patrizia Cavalloro; Fabrizio Ferrandi (ASP-DAC, 1997)

Configuration-Specific Test Pattern Extraction for Field Programmable Gate Arrays. - Fabrizio Ferrandi; Franco Fummi; Laura Pozzi 001; Mariagiovanna Sami (DFT, 1997)

How an "Evolving" Fault Model Improves the Behavioral Test Generation. - Giacomo Buonanno; Fabrizio Ferrandi; L. Ferrandi; Franco Fummi; Donatella Sciuto (Great Lakes Symposium on VLSI, 1997)

Application of a Testing Framework to VHDL Descriptions at Different Abstraction Levels. - M. Bacis; Giacomo Buonanno; Fabrizio Ferrandi; Franco Fummi; Luca Gerli; Donatella Sciuto (ICCD, 1997)

Testing Core-Based Systems: A Symbolic Methodology. - Fabrizio Ferrandi; Franco Fummi; Donatella Sciuto; Enrico Macii; Massimo Poncino (IEEE Des. Test Comput., 1997)

Power Estimation of Behavioral Descriptions. - Fabrizio Ferrandi; Franco Fummi; Enrico Macii; Massimo Poncino (DATE, 1998)

VHDL Testability Analysis Based on Fault Clustering and Implicit Fault Injection. - F. S. Bietti; Fabrizio Ferrandi; Franco Fummi; Donatella Sciuto (Great Lakes Symposium on VLSI, 1998)

Symbolic algorithms for layout-oriented synthesis of pass transistor logic circuits. - Fabrizio Ferrandi; Alberto Macii; Enrico Macii; Massimo Poncino; Riccardo Scarsi; Fabio Somenzi (ICCAD, 1998)

Automatic VHDL restructuring for RTL synthesis optimization and testability improvement. - D. Corvino; Italo Epicoco; Fabrizio Ferrandi; Franco Fummi; Donatella Sciuto (ICCD, 1998)

Implicit test generation for behavioral VHDL models. - Fabrizio Ferrandi; Franco Fummi; Donatella Sciuto (ITC, 1998)

Symbolic Functional Vector Generation for VHDL Specifications. - Fabrizio Ferrandi; Franco Fummi; Luca Gerli; Donatella Sciuto (DATE, 1999)

Increase the Behavioral Fault Model Accuracy Using High-Level Synthesis Information. - Marco Brera; Fabrizio Ferrandi; Donatella Sciuto; Franco Fummi (DFT, 1999)

BIST Architectures Selection Based on Behavioral Testing. - Giuseppe Biasoli; Fabrizio Ferrandi; Donatella Sciuto; Alessandro Fin; Franco Fummi (DFT, 2000)

An approach to functional testing of VLIW architectures. - M. Beardo; Francesco Bruschi; Fabrizio Ferrandi; Donatella Sciuto (HLDVT, 2000)

An Application of Genetic Algorithms and BDDs to Functional Testing. - Fabrizio Ferrandi; Donatella Sciuto; Alessandro Fin; Franco Fummi (ICCD, 2000)

Testability Alternatives Exploration through Functional Testing. - Fabrizio Ferrandi; G. Fornara; Donatella Sciuto; G. Ferrara; Franco Fummi (VTS, 2000)

Symbolic optimization of interacting controllers based onredundancy identification and removal. - Fabrizio Ferrandi; Franco Fummi; Enrico Macii; Massimo Poncino; Donatella Sciuto (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000)

Functional test generation for behaviorally sequential models. - Fabrizio Ferrandi; G. Ferrara; Donatella Sciuto; Alessandro Fin; Franco Fummi (DATE, 2001)

Semiconcurrent Error Detection in Data Paths. - Anna Antola; Fabrizio Ferrandi; Vincenzo Piuri; Mariagiovanna Sami (IEEE Trans. Computers, 2001)

An efficient heuristic approach to solve the unate covering problem. - Roberto Cordone; Fabrizio Ferrandi; Donatella Sciuto; Roberto Wolfler Calvo (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001)

Error Simulation Based on the SystemC Design Description Language. - Francesco Bruschi; Michele Chiamenti; Fabrizio Ferrandi; Donatella Sciuto (DATE, 2002)

Functional Verification for SystemC Descriptions Using Constraint Solving. - Fabrizio Ferrandi; Michele Rendine; Donatella Sciuto (DATE, 2002)

Behavioral test generation for the selection of BIST logic. - Giuseppe Biasoli; Fabrizio Ferrandi; Alessandro Fin; Franco Fummi; Donatella Sciuto (J. Syst. Archit., 2002)

Test Generation and Testability Alternatives Exploration of Critical Algorithms for Embedded Applications. - Fabrizio Ferrandi; Franco Fummi; Donatella Sciuto (IEEE Trans. Computers, 2002)

Mining interesting patterns from hardware-software codesign data with the learning classifier system XCS. - Fabrizio Ferrandi; Pier Luca Lanzi; Donatella Sciuto (IEEE Congress on Evolutionary Computation, 2003)

Synthesis of Complex Control Structures from Behavioral SystemC Models. - Francesco Bruschi; Fabrizio Ferrandi (DATE, 2003)

Identification of design errors through functional testing. - Fabrizio Ferrandi; Franco Fummi; Graziano Pravadelli; Donatella Sciuto (IEEE Trans. Reliab., 2003)

System-level metrics for hardware/software architectural mapping. - Fabrizio Ferrandi; Pier Luca Lanzi; Donatella Sciuto; Mara Tanelli (DELTA, 2004)

System Level Hardware-Software Design Exploration with XCS. - Fabrizio Ferrandi; Pier Luca Lanzi; Donatella Sciuto (GECCO (2), 2004)

Caronte: A Complete Methodology for the Implementation of Partially Dynamically Self-Reconfiguring Systems on FPGA Platforms. - Alberto Donato; Fabrizio Ferrandi; Massimo Redaelli; Marco D. Santambrogio; Donatella Sciuto (FCCM, 2005)

A Design Methodology for Dynamic Reconfiguration: The Caronte Architecture. - Fabrizio Ferrandi; Marco D. Santambrogio; Donatella Sciuto (IPDPS, 2005)

Operating system support for dynamically reconfigurable SoC architectures. - Alberto Donato; Fabrizio Ferrandi; Marco D. Santambrogio; Donatella Sciuto (SoCC, 2005)

Caronte: A methodology for the Implementation of Partially dynamically Self-Reconfiguring Systems on FPGA Platforms. - Alberto Donato; Fabrizio Ferrandi; Massimo Redaelli; Marco D. Santambrogio; Donatella Sciuto (VLSI-SoC, 2005)

A Framework for the Functional Verification of SystemC Models. - Francesco Bruschi; Fabrizio Ferrandi; Donatella Sciuto (Int. J. Parallel Program., 2005)

Using speculative computation and parallelizing techniques to improve scheduling of control based designs. - Roberto Cordone; Fabrizio Ferrandi; Marco D. Santambrogio; Gianluca Palermo; Donatella Sciuto (ASP-DAC, 2006)

SyCERS: a SystemC Design Exploration Framework for SoC Reconfigurable Architecture. - Carlo Amicucci; Fabrizio Ferrandi; Marco D. Santambrogio; Donatella Sciuto (ERSA, 2006)

A SystemC-based Framework of Communication Architecture. - Francesco Bruschi; Fabrizio Ferrandi (FDL, 2006)

VHDL to FPGA automatic IP-Core generation: a case study on Xilinx design flow. - Fabrizio Ferrandi; Giovanna Ferrara; Roberto Palazzo; Vincenzo Rana; Marco D. Santambrogio (IPDPS, 2006)

Dynamic Reconfiguration: Core Relocation via Partial Bitstreams Filtering with Minimal Overhead. - Fabrizio Ferrandi; Marco Novati; Massimo Morandi; Marco D. Santambrogio; Donatella Sciuto (SoC, 2006)

Automatic Test Pattern Generation with BOA. - Tiziana Gravagnoli; Fabrizio Ferrandi; Pier Luca Lanzi; Donatella Sciuto (PPSN, 2006)

Hardware DWT accelerator for MultiProcessor System-on-Chip on FPGA. - Simone Borgio; Davide Bosisio; Fabrizio Ferrandi; Matteo Monchiero; Marco D. Santambrogio; Donatella Sciuto; Antonino Tumeo (ICSAMOS, 2006)

A Self-Reconfigurable Implementation of the JPEG Encoder. - Antonino Tumeo; Matteo Monchiero; Gianluca Palermo; Fabrizio Ferrandi; Donatella Sciuto (ASAP, 2007)

Fitness inheritance in evolutionary and multi-objective high-level synthesis. - Christian Pilato; Gianluca Palermo; Antonino Tumeo; Fabrizio Ferrandi; Donatella Sciuto; Pier Luca Lanzi (IEEE Congress on Evolutionary Computation, 2007)

A design kit for a fully working shared memory multiprocessor on FPGA. - Antonino Tumeo; Matteo Monchiero; Gianluca Palermo; Fabrizio Ferrandi; Donatella Sciuto (ACM Great Lakes Symposium on VLSI, 2007)

Automatic Parallelization of Sequential Specifications for Symmetric MPSoCs. - Fabrizio Ferrandi; Luca Fossati; Marco Lattuada 001; Gianluca Palermo; Donatella Sciuto; Antonino Tumeo (IESS, 2007)

Two Novel Approaches to Online Partial Bitstream Relocation in a Dynamically Reconfigurable System. - Simone Corbetta; Fabrizio Ferrandi; Massimo Morandi; Marco Novati; Marco D. Santambrogio; Donatella Sciuto (ISVLSI, 2007)

A Hash-based Approach for Functional Regularity Extraction During Logic Synthesis. - Angelo P. E. Rosiello; Fabrizio Ferrandi; Davide Pandini; Donatella Sciuto (ISVLSI, 2007)

A Pipelined Fast 2D-DCT Accelerator for FPGA-based SoCs. - Antonino Tumeo; Matteo Monchiero; Gianluca Palermo; Fabrizio Ferrandi; Donatella Sciuto (ISVLSI, 2007)

An Internal Partial Dynamic Reconfiguration Implementation of the JPEG Encoder for Low-Cost FPGAsb. - Antonino Tumeo; Matteo Monchiero; Gianluca Palermo; Fabrizio Ferrandi; Donatella Sciuto (ISVLSI, 2007)

An Evolutionary Approach to Area-Time Optimization of FPGA designs. - Fabrizio Ferrandi; Pier Luca Lanzi; Gianluca Palermo; Christian Pilato; Donatella Sciuto; Antonino Tumeo (ICSAMOS, 2007)

An Interrupt Controller for FPGA-based Multiprocessors. - Antonino Tumeo; Marco Branca; Lorenzo Camerini; Matteo Monchiero; Gianluca Palermo; Fabrizio Ferrandi; Donatella Sciuto (ICSAMOS, 2007)

A layout-similarity-based approach for detecting phishing pages. - Angelo P. E. Rosiello; Engin Kirda; Christopher Kruegel; Fabrizio Ferrandi (SecureComm, 2007)

Lightweight DMA management mechanisms for multiprocessors on FPGA. - Antonino Tumeo; Matteo Monchiero; Gianluca Palermo; Fabrizio Ferrandi; Donatella Sciuto (ASAP, 2008)

High-level synthesis with multi-objective genetic algorithm: A comparative encoding analysis. - Christian Pilato; Daniele Loiacono; Fabrizio Ferrandi; Pier Luca Lanzi; Donatella Sciuto (IEEE Congress on Evolutionary Computation, 2008)

A Dual-Priority Real-Time Multiprocessor System on FPGA for Automotive Applications. - Antonino Tumeo; Marco Branca; Lorenzo Camerini; Marco Ceriani; Matteo Monchiero; Gianluca Palermo; Fabrizio Ferrandi; Donatella Sciuto (DATE, 2008)

A Multi-objective Genetic Algorithm for Design Space Exploration in High-Level Synthesis. - Fabrizio Ferrandi; Pier Luca Lanzi; Daniele Loiacono; Christian Pilato; Donatella Sciuto (ISVLSI, 2008)

Ant colony optimization for mapping and scheduling in heterogeneous multiprocessor systems. - Antonino Tumeo; Christian Pilato; Fabrizio Ferrandi; Donatella Sciuto; Pier Luca Lanzi (ICSAMOS, 2008)

Improving evolutionary exploration to area-time optimization of FPGA designs. - Christian Pilato; Antonino Tumeo; Gianluca Palermo; Fabrizio Ferrandi; Pier Luca Lanzi; Donatella Sciuto (J. Syst. Archit., 2008)

Prototyping pipelined applications on a heterogeneous FPGA multiprocessor virtual platform. - Antonino Tumeo; Marco Branca; Lorenzo Camerini; Marco Ceriani; Matteo Monchiero; Gianluca Palermo; Fabrizio Ferrandi; Donatella Sciuto (ASP-DAC, 2009)

Mapping pipelined applications onto heterogeneous embedded systems: a bayesian optimization algorithm based approach. - Antonino Tumeo; Marco Branca; Lorenzo Camerini; Christian Pilato; Pier Luca Lanzi; Fabrizio Ferrandi; Donatella Sciuto (CODES+ISSS, 2009)

HW/SW methodologies for synchronization in FPGA multiprocessors. - Antonino Tumeo; Christian Pilato; Gianluca Palermo; Fabrizio Ferrandi; Donatella Sciuto (FPGA, 2009)

Evolutionary algorithms for the mapping of pipelined applications onto heterogeneous embedded systems. - Marco Branca; Lorenzo Camerini; Fabrizio Ferrandi; Pier Luca Lanzi; Christian Pilato; Donatella Sciuto; Antonino Tumeo (GECCO, 2009)

A multiprocessor self-reconfigurable JPEG2000 encoder. - Antonino Tumeo; Simone Borgio; Davide Bosisio; Matteo Monchiero; Gianluca Palermo; Fabrizio Ferrandi; Donatella Sciuto (IPDPS, 2009)

hArtes design flow for heterogeneous platforms. - Muhammad Rashid 001; Fabrizio Ferrandi; Koen Bertels (ISQED, 2009)

Performance modeling of parallel applications on MPSoCs. - Marco Lattuada 001; Christian Pilato; Antonino Tumeo; Fabrizio Ferrandi (SoC, 2009)

Performance estimation for task graphs combining sequential path profiling and control dependence regions. - Fabrizio Ferrandi; Marco Lattuada 001; Christian Pilato; Antonino Tumeo (MEMOCODE, 2009)

Combining Target-independent Analysis with Dynamic Profiling to Build the Performance Model of a DSP. - Marco Lattuada 001; Fabrizio Ferrandi (CIT, 2010)

Mapping and scheduling of parallel C applications with ant colony optimization onto heterogeneous reconfigurable MPSoCs. - Fabrizio Ferrandi; Christian Pilato; Donatella Sciuto; Antonino Tumeo (ASP-DAC, 2010)

Performance modeling of embedded applications with zero architectural knowledge. - Marco Lattuada 001; Fabrizio Ferrandi (CODES+ISSS, 2010)

A reconfigurable multiprocessor architecture for a reliable face recognition implementation. - Antonino Tumeo; Francesco Regazzoni 001; Gianluca Palermo; Fabrizio Ferrandi; Donatella Sciuto (DATE, 2010)

Multiprocessor systems-on-chip synthesis using multi-objective evolutionary computation. - Marco Ceriani; Fabrizio Ferrandi; Pier Luca Lanzi; Donatella Sciuto; Antonino Tumeo (GECCO, 2010)

A Fast Heuristic for Extending Standard Cell Libraries with Regular Macro Cells. - Christian Pilato; Fabrizio Ferrandi; Davide Pandini (ISVLSI, 2010)

Fine grain analysis of simulators accuracy for calibrating performance models. - Marco Lattuada 001; Fabrizio Ferrandi (International Symposium on Rapid System Prototyping, 2010)

HArtes: Hardware-Software Codesign for Heterogeneous Multicore Platforms. - Koen Bertels; Vlad Mihai Sima; Yana Yankova; Georgi Kuzmanov; Wayne Luk; José Gabriel F. Coutinho; Fabrizio Ferrandi; Christian Pilato; Marco Lattuada 001; Donatella Sciuto; Andrea Michelotti (IEEE Micro, 2010)

Ant Colony Heuristic for Mapping and Scheduling Tasks and Communications on Heterogeneous Embedded Systems. - Fabrizio Ferrandi; Pier Luca Lanzi; Christian Pilato; Donatella Sciuto; Antonino Tumeo (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010)

A runtime adaptive controller for supporting hardware components with variable latency. - Christian Pilato; Vito Giovanni Castellana; Silvia Lovergine; Fabrizio Ferrandi (AHS, 2011)

SYNAPTIC Project: Regularity Applied to Enhance Manufacturability and Yield at Several Abstraction Levels. - Martin Elhøj; André Inácio Reis; Renato P. Ribas; Fabrizio Ferrandi; Christian Pilato; Francesc Moll; Miguel Miranda; Petr Dobrovolný; Nigel Woolaway; Arnaud Grasset; Philippe Bonnot 001; Giuseppe Desoli; et al. (ARCS Workshops, 2011)

Evaluating Static CMOS Complex Cells in Technology Mapping. - Christian Pilato; Fabrizio Ferrandi; Davide Pandini (ARCS Workshops, 2011)

A design methodology to implement memory accesses in high-level synthesis. - Christian Pilato; Fabrizio Ferrandi; Donatella Sciuto (CODES+ISSS, 2011)

A design methodology for the automatic sizing of standard-cell libraries. - Christian Pilato; Fabrizio Ferrandi; Davide Pandini (ACM Great Lakes Symposium on VLSI, 2011)

Performance estimation of embedded software with confidence levels. - Marco Lattuada 001; Fabrizio Ferrandi (ASP-DAC, 2012)

Instructions activating conditions for hardware-based auto-scheduling. - Silvia Lovergine; Fabrizio Ferrandi (Conf. Computing Frontiers, 2012)

Abstract: Speeding-Up Memory Intensive Applications through Adaptive Hardware Accelerators. - Vito Giovanni Castellana; Fabrizio Ferrandi (SC Companion, 2012)

Ant Colony Optimization for mapping, scheduling and placing in reconfigurable systems. - Fabrizio Ferrandi; Pier Luca Lanzi; Christian Pilato; Donatella Sciuto; Antonino Tumeo (AHS, 2013)

Scheduling independent liveness analysis for register binding in high level synthesis. - Vito Giovanni Castellana; Fabrizio Ferrandi (DATE, 2013)

Bambu: A modular framework for the high level synthesis of memory-intensive applications. - Christian Pilato; Fabrizio Ferrandi (FPL, 2013)

An automated flow for the High Level Synthesis of coarse grained parallel applications. - Vito Giovanni Castellana; Fabrizio Ferrandi (FPT, 2013)

Dynamic AC-scheduling for hardware cores with unknown and uncertain information. - Silvia Lovergine; Fabrizio Ferrandi (ICCD, 2013)

Applications Acceleration through Adaptive Hardware Components. - Vito Giovanni Castellana; Fabrizio Ferrandi (IPDPS Workshops, 2013)

Harnessing Adaptivity Analysis for the Automatic Design of Efficient Embedded and HPC Systems. - Silvia Lovergine; Fabrizio Ferrandi (IPDPS Workshops, 2013)

YAPPA: A compiler-based parallelization framework for irregular applications on MPSoCs. - Silvia Lovergine; Antonino Tumeo; Oreste Villa; Fabrizio Ferrandi (RSP, 2013)

Modeling pipelined application with Synchronous Data Flow graphs. - Marco Lattuada 001; Fabrizio Ferrandi (ICSAMOS, 2013)

An adaptive Memory Interface Controller for improving bandwidth utilization of hybrid and reconfigurable systems. - Vito Giovanni Castellana; Antonino Tumeo; Fabrizio Ferrandi (DATE, 2014)

High-level synthesis of memory bound and irregular parallel applications with Bambu. - Vito Giovanni Castellana; Antonino Tumeo; Fabrizio Ferrandi (Hot Chips Symposium, 2014)

Exploiting Outer Loops Vectorization in High Level Synthesis. - Marco Lattuada 001; Fabrizio Ferrandi (ARCS, 2015)

Function Proxies for Improved Resource Sharing in High Level Synthesis. - Marco Minutoli; Vito Giovanni Castellana; Antonino Tumeo; Fabrizio Ferrandi (FCCM, 2015)

Inter-procedural resource sharing in High Level Synthesis through function proxies. - Marco Minutoli; Vito Giovanni Castellana; Antonino Tumeo; Fabrizio Ferrandi (FPL, 2015)

High Level Synthesis of RDF Queries for Graph Analytics. - Vito Giovanni Castellana; Marco Minutoli; Alessandro Morari; Antonino Tumeo; Marco Lattuada 001; Fabrizio Ferrandi (ICCAD, 2015)

Code Transformations Based on Speculative SDC Scheduling. - Marco Lattuada 001; Fabrizio Ferrandi (ICCAD, 2015)

Trace-based automated logical debugging for high-level synthesis generated circuits. - Pietro Fezzardi; Michele Castellana; Fabrizio Ferrandi (ICCD, 2015)

Modeling Resolution of Resources Contention in Synchronous Data Flow Graphs. - Marco Lattuada 001; Fabrizio Ferrandi (J. Signal Process. Syst., 2015)

Enabling the high level synthesis of data analytics accelerators. - Marco Minutoli; Vito Giovanni Castellana; Antonino Tumeo; Marco Lattuada 001; Fabrizio Ferrandi (CODES+ISSS, 2016)

A Dynamically Scheduled Architecture for the Synthesis of Graph Database Queries. - Marco Minutoli; Vito Giovanni Castellana; Antonino Tumeo; Fabrizio Ferrandi; Marco Lattuada 001 (FCCM, 2016)

Automated bug detection for pointers and memory accesses in High-Level Synthesis compilers. - Pietro Fezzardi; Fabrizio Ferrandi (FPL, 2016)

A dynamically scheduled architecture for the synthesis of graph methods. - Marco Minutoli; Vito Giovanni Castellana; Antonino Tumeo; Marco Lattuada 001; Fabrizio Ferrandi (Hot Chips Symposium, 2016)

Efficient synthesis of graph methods: a dynamically scheduled architecture. - Marco Minutoli; Vito Giovanni Castellana; Antonino Tumeo; Marco Lattuada 001; Fabrizio Ferrandi (ICCAD, 2016)

Performance Estimation of Task Graphs Based on Path Profiling. - Marco Lattuada 001; Christian Pilato; Fabrizio Ferrandi (Int. J. Parallel Program., 2016)

A Survey and Evaluation of FPGA High-Level Synthesis Tools. - Razvan Nane; Vlad Mihai Sima; Christian Pilato; Jongsok Choi; Blair Fort; Andrew Canis; Yu Ting Chen; Hsuan Hsiao; Stephen Brown 003; Fabrizio Ferrandi; Jason Helge Anderson; Koen Bertels (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016)

Exploiting vectorization in high level synthesis of nested irregular loops. - Marco Lattuada 001; Fabrizio Ferrandi (J. Syst. Archit., 2017)

Using Efficient Path Profiling to Optimize Memory Consumption of On-Chip Debugging for High-Level Synthesis. - Pietro Fezzardi; Marco Lattuada 001; Fabrizio Ferrandi (ACM Trans. Embed. Comput. Syst., 2017)

Enabling Automated Bug Detection for IP-Based Designs Using High-Level Synthesis. - Pietro Fezzardi; Fabrizio Ferrandi; Christian Pilato (IEEE Des. Test, 2018)

Data Transfers Analysis in Computer Assisted Design Flow of FPGA Accelerators for Aerospace Systems. - Marco Lattuada 001; Fabrizio Ferrandi; Maxime Perrotin (IEEE Trans. Multi Scale Comput. Syst., 2018)

Software defined architectures for data analytics. - Vito Giovanni Castellana; Marco Minutoli; Antonino Tumeo; Marco Lattuada 001; Pietro Fezzardi; Fabrizio Ferrandi (ASP-DAC, 2019)

A Design Flow Engine for the Support of Customized Dynamic High Level Synthesis Flows. - Marco Lattuada 001; Fabrizio Ferrandi (ACM Trans. Reconfigurable Technol. Syst., 2019)

Tensor Optimization for High-Level Synthesis Design Flows. - Marco Siracusa; Fabrizio Ferrandi (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Automated Bug Detection for High-level Synthesis of Multi-threaded Irregular Applications. - Pietro Fezzardi; Fabrizio Ferrandi (ACM Trans. Parallel Comput., 2020)

Invited: Bambu: an Open-Source Research Framework for the High-Level Synthesis of Complex Applications. - Fabrizio Ferrandi; Vito Giovanni Castellana; Serena Curzel; Pietro Fezzardi; Michele Fiorito; Marco Lattuada 001; Marco Minutoli; Christian Pilato; Antonino Tumeo (DAC, 2021)

EVEREST: A design environment for extreme-scale big data analytics on heterogeneous platforms. - Christian Pilato; Stanislav Böhm; Fabien Brocheton; Jerónimo Castrillón; Riccardo Cevasco; Vojtech Cima; Radim Cmar; Dionysios Diamantopoulos; Fabrizio Ferrandi; Jan Martinovic; Gianluca Palermo; Michele Paolino; et al. (DATE, 2021)

Parametric Throughput Oriented Large Integer Multipliers for High Level Synthesis. - Emanuele Vitali; Davide Gadioli; Fabrizio Ferrandi; Gianluca Palermo (DATE, 2021)

Automated Generation of Integrated Digital and Spiking Neuromorphic Machine Learning Accelerators. - Serena Curzel; Nicolas Bohm Agostini; Shihao Song; Ismet Dagli; Ankur Limaye; Cheng Tan 002; Marco Minutoli; Vito Giovanni Castellana; Vinay Amatya; Joseph B. Manzano; Anup Das 001; Fabrizio Ferrandi; et al. (ICCAD, 2021)

High-Level Synthesis of Parallel Specifications Coupling Static and Dynamic Controllers. - Vito Giovanni Castellana; Antonino Tumeo; Fabrizio Ferrandi (IPDPS, 2021)

De-specializing an HLS library for Deep Neural Networks: improvements upon hls4ml. - Serena Curzel; Nicolò Ghielmetti; Michele Fiorito; Fabrizio Ferrandi (CoRR, 2021)

Automatic Generation of Heterogeneous SoC Architectures With Secure Communications. - Mattia Tibaldi; Christian Pilato; Fabrizio Ferrandi (IEEE Embed. Syst. Lett., 2021)

MLIR Loop Optimizations for High-Level Synthesis: A Case Study. - Serena Curzel; Sofija Jovic; Michele Fiorito; Antonino Tumeo; Fabrizio Ferrandi (PACT, 2022)

Hardware acceleration of complex machine learning models through modern high-level synthesis. - Serena Curzel; Nicolas Bohm Agostini; Antonino Tumeo; Fabrizio Ferrandi (CF, 2022)

The SODA approach: leveraging high-level synthesis for hardware/software co-design and hardware specialization: invited. - Nicolas Bohm Agostini; Serena Curzel; Ankur Limaye; Vinay Amatya; Marco Minutoli; Vito Giovanni Castellana; Joseph B. Manzano; Antonino Tumeo; Fabrizio Ferrandi (DAC, 2022)

From High-Level Frameworks to custom Silicon with SODA. - Serena Curzel; Nicolas Bohm Agostini; Reece Neff; Ankur Limaye; Jeff Jun Zhang; Vinay Amatya; Marco Minutoli; Vito Giovanni Castellana; Joseph B. Manzano; David Brooks 001; Gu-Yeon Wei; Fabrizio Ferrandi; et al. (HCS, 2022)

SODA Synthesizer: An Open-Source, Multi-Level, Modular, Extensible Compiler from High-Level Frameworks to Silicon. - Nicolas Bohm Agostini; Ankur Limaye; Marco Minutoli; Vito Giovanni Castellana; Joseph B. Manzano; Antonino Tumeo; Serena Curzel; Fabrizio Ferrandi (ICCAD, 2022)

End-to-End Synthesis of Dynamically Controlled Machine Learning Accelerators. - Serena Curzel; Nicolas Bohm Agostini; Vito Giovanni Castellana; Marco Minutoli; Ankur Limaye; Joseph B. Manzano; Jeff Zhang 001; David Brooks 001; Gu-Yeon Wei; Fabrizio Ferrandi; Antonino Tumeo (IEEE Trans. Computers, 2022)

Svelto: High-Level Synthesis of Multi-Threaded Accelerators for Graph Analytics. - Marco Minutoli; Vito Giovanni Castellana; Nicola Saporetti; Stefano Devecchi; Marco Lattuada 001; Pietro Fezzardi; Antonino Tumeo; Fabrizio Ferrandi (IEEE Trans. Computers, 2022)

Towards On-Chip Learning for Low Latency Reasoning with End-to-End Synthesis. - Vito Giovanni Castellana; Nicolas Bohm Agostini; Ankur Limaye; Vinay Amatya; Marco Minutoli; Joseph B. Manzano; Antonino Tumeo; Serena Curzel; Michele Fiorito; Fabrizio Ferrandi (ASP-DAC, 2023)

Exploration of Synthesis Methods from Simulink Models to FPGA for Aerospace Applications. - Serena Curzel; Michele Fiorito; Patricia López Cueva; Tiago Jorge; Thanassis Tsiodras; Fabrizio Ferrandi (CF, 2023)

High-Level Synthesis of the OpenMP runtime to improve the generation of parallel accelerators. - Giovanni Gozzi; Michele Fiorito; Serena Curzel; Fabrizio Ferrandi (CF, 2023)

HERMES: qualification of High pErformance pRogrammable Microprocessor and dEvelopment of Software ecosystem. - Nadia Ibellaatti; Edouard Lepape; Alp Kiliç; Kaya Akyel; Kassem Chouayakh; Fabrizio Ferrandi; Claudio Barone; Serena Curzel; Michele Fiorito; Giovanni Gozzi; Miguel Masmano; Ana Risquez Navarro; et al. (DATE, 2023)

Using High-Level Synthesis to model System Verilog procedural timing controls. - Luca Ezio Pozzoni; Fabrizio Ferrandi; Loris Mendola; Alfio Antonino Palazzo; Francesco Pappalardo 002 (DATE, 2023)

TrueFloat: A Templatized Arithmetic Library for HLS Floating-Point Operators. - Michele Fiorito; Serena Curzel; Fabrizio Ferrandi (SAMOS, 2023)

A Survey on Design Methodologies for Accelerating Deep Learning on Heterogeneous Architectures. - Fabrizio Ferrandi; Serena Curzel; Leandro Fiorin; Daniele Ielmini; Cristina Silvano; Francesco Conti 001; Alessio Burrello; Francesco Barchi; Luca Benini; Luciano Lavagno; Teodoro Urso; Enrico Calore; et al. (CoRR, 2023)

Towards Automated Generation of Chiplet-Based Systems Invited Paper. - Ankur Limaye; Claudio Barone; Nicolas Bohm Agostini; Marco Minutoli; Joseph B. Manzano; Vito Giovanni Castellana; Giovanni Gozzi; Michele Fiorito; Serena Curzel; Fabrizio Ferrandi; Antonino Tumeo (ASPDAC, 2024)

High-level synthesis for complex applications: the Bambu approach. - Fabrizio Ferrandi (CF (Companion), 2024)

A DNN-based Background Segmentation Accelerator for FPGA-equipped satellites. - Michele Fiorito; Serena Curzel; Giovanni Gozzi; Fabrizio Ferrandi (CF (Companion), 2024)

A System Development Kit for Big Data Applications on FPGA-based Clusters: The EVEREST Approach. - Christian Pilato; Subhadeep Banik; Jakub Beránek; Fabien Brocheton; Jerónimo Castrillón; Riccardo Cevasco; Radim Cmar; Serena Curzel; Fabrizio Ferrandi; Karl F. A. Friebel; Antonella Galizia; Matteo Grasso; et al. (DATE, 2024)

Pre-scheduling of Affine Loops for HLS Pipelining. - Serena Curzel; Sofija Jovic; Michele Fiorito; Antonino Tumeo; Fabrizio Ferrandi (Euro-Par Workshops (2), 2024)

Etna: MLIR-Based System-Level Design and Optimization for Transparent Application Execution on CPU-FPGA Nodes. - Stephanie Soldavini; Felix Suchert; Serena Curzel; Michele Fiorito; Karl F. A. Friebel; Fabrizio Ferrandi; Radim Cmar; Jerónimo Castrillón; Christian Pilato (FCCM, 2024)

High-Level Synthesis Developments in the Context of European Space Technology Research (Invited Talk). - Fabrizio Ferrandi; Michele Fiorito; Claudio Barone; Giovanni Gozzi; Serena Curzel (PARMA-DITAM, 2024)

Extending High-Level Synthesis with AI/ML Methods. - Nicolas Bohm Agostini; Giovanni Gozzi; Michele Fiorito; Claudio Barone; Serena Curzel; Ankur Limaye; Marco Minutoli; Vito Giovanni Castellana; Joseph B. Manzano; Fabrizio Ferrandi; Antonino Tumeo (ICCAD, 2024)

To Cache or not to Cache? Exploring the Design Space of Tunable, HLS-generated Accelerators. - Claudio Barone; Rishika Kushwah; Ankur Limaye; Vito Giovanni Castellana; Giovanni Gozzi; Michele Fiorito; Fabrizio Ferrandi; Antonino Tumeo (MEMSYS, 2024)

A Synthesis Methodology for Intelligent Memory Interfaces in Accelerator Systems. - Ankur Limaye; Nicolas Bohm Agostini; Claudio Barone; Vito Giovanni Castellana; Michele Fiorito; Fabrizio Ferrandi; Andres Marquez 001; Antonino Tumeo (ASP-DAC, 2025)

POSTER: A System-level HW/SW Co-simulation Framework for HLS-generated Accelerators. - Michele Fiorito; Serena Curzel; Fabrizio Ferrandi (CF, 2025)

Multi-Partner Project: Architectures and Design Methodologies to Accelerate AI Workloads. The ICSC Flagship 2 Project. - Cristina Silvano; Fabrizio Ferrandi; Serena Curzel; Daniele Ielmini; Stefania Perri; Fanny Spagnolo; Pasquale Corsonello; Sebastiano Fabio Schifano; Cristian Zambelli; Angelo Garofalo; Francesco Conti 001; Luca Benini (DATE, 2025)

SPARTA: High-Level Synthesis of Parallel Multi-Threaded Accelerators. - Giovanni Gozzi; Michele Fiorito; Serena Curzel; Claudio Barone; Vito Giovanni Castellana; Marco Minutoli; Antonino Tumeo; Fabrizio Ferrandi (ACM Trans. Reconfigurable Technol. Syst., 2025)

A Survey on Deep Learning Hardware Accelerators for Heterogeneous HPC Platforms. - Cristina Silvano; Daniele Ielmini; Fabrizio Ferrandi; Leandro Fiorin; Serena Curzel; Luca Benini; Francesco Conti 001; Angelo Garofalo; Cristian Zambelli; Enrico Calore; Sebastiano Fabio Schifano; Maurizio Palesi; et al. (ACM Comput. Surv., 2025)