A 50 Mbit/s Iterative Turbo-Decoder. - Fabrizio Viglione; Guido Masera; Gianluca Piccinini; Massimo Ruo Roch; Maurizio Zamboni (DATE, 2000)

Architectural strategies for low-power VLSI turbo decoders. - Guido Masera; Marco Mazza; Gianluca Piccinini; Fabrizio Viglione; Maurizio Zamboni (IEEE Trans. Very Large Scale Integr. Syst., 2002)

Designing fast on-chip interconnects for deep submicrometer technologies. - Razak Hossain; Fabrizio Viglione; Marco Cavalli (IEEE Trans. Very Large Scale Integr. Syst., 2003)