A fast and accurate methodology for power estimation and reduction of programmable architectures. - Erwan Piriou; Raphaël David; Fahim Rahim; Solaiman Rahim (DATE, 2013)

Reducing power with activity trigger analysis. - Jan Láník; Julien Legriel; Erwan Piriou; Emmanuel Viaud; Fahim Rahim; Oded Maler; Solaiman Rahim (MEMOCODE, 2015)

Conclusively verifying clock-domain crossings in very large hardware designs. - Guillaume Plassan; Hans-Jörg Peter; Katell Morin-Allory; Fahim Rahim; Shaker Sarwary; Dominique Borrione (VLSI-SoC, 2016)

Mutually orthogonal frequency rectangles. - Fahim Rahim; Nicholas J. Cavenagh (Discret. Math., 2023)